component
74HC595M
Public Made by Adomby adom
HGSEMI Shifting Register, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)
be7611e
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{
"schema": "adom.pads/1",
"slug": "74hc595m",
"footprint": "SOIC-16_3.9x9.9mm_P1.27mm",
"generated_from": {
"footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
"pins": "page.json:component.pins",
"overrides": null
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-4.445
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"
},
"pad_count": 16,
"symbol_pins": [
"1",
"10",
"11",
"12",
"13",
"14",
"15",
"16",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9"
],
"paste_apertures": 0,
"issues": [],
"pads": [
{
"pad": "1",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "1",
"name": "QB",
"type": "tri_state",
"description": "Parallel data output bit B. Tri-state; enabled when /G is low, high-Z when /G is high. Reflects the stored value in the output storage register.",
"is_pin1": true,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "2",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "2",
"name": "QC",
"type": "tri_state",
"description": "Parallel data output bit C. Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "3",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "3",
"name": "QD",
"type": "tri_state",
"description": "Parallel data output bit D. Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "4",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "4",
"name": "QE",
"type": "tri_state",
"description": "Parallel data output bit E. Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "5",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "5",
"name": "QF",
"type": "tri_state",
"description": "Parallel data output bit F. Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "6",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "6",
"name": "QG",
"type": "tri_state",
"description": "Parallel data output bit G. Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "7",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "7",
"name": "QH",
"type": "tri_state",
"description": "Parallel data output bit H (MSB of the 8-bit storage register). Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "8",
"kind": "smd",
"shape": "roundrect",
"at": [
-2.475,
4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "8",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V). Return for VCC.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "9",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "9",
"name": "Q'H",
"type": "output",
"description": "Serial data output from the last stage (QH) of the shift register. Used to cascade multiple 74HC595 devices to form an 8n-bit shift register. Not tri-stated by /G.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "10",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "10",
"name": "/SCLR",
"type": "input",
"description": "Active-low shift register clear. When held low, the 8-bit shift register is asynchronously reset to zero. Must be held high for normal shift operation.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "11",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "11",
"name": "SCK",
"type": "input",
"description": "Shift register clock. Serial data on SER is sampled and shifted through the 8-bit register on the rising edge of SCK. Maximum frequency 10 MHz (typ, VCC=5V).",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "12",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "12",
"name": "RCK",
"type": "input",
"description": "Storage (latch) register clock. On the rising edge of RCK, the current contents of the shift register are transferred to the 8-bit output storage register and appear at QA..QH.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "13",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-0.635
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "13",
"name": "/G",
"type": "input",
"description": "Active-low output enable for the parallel outputs QA..QH. When low, outputs are driven; when high, QA..QH are placed in high-impedance (tri-state). Does not affect Q'H or the internal registers.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "14",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-1.905
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "14",
"name": "SER",
"type": "input",
"description": "Serial data input. The logic level on SER is loaded into the first stage of the shift register on the rising edge of SCK.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "15",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-3.175
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "15",
"name": "QA",
"type": "tri_state",
"description": "Parallel data output bit A (LSB of the 8-bit storage register). Tri-state; enabled when /G is low, high-Z when /G is high.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
},
{
"pad": "16",
"kind": "smd",
"shape": "roundrect",
"at": [
2.475,
-4.445
],
"rot": 0.0,
"size": [
1.95,
0.6
],
"layers": [
"F.Cu",
"F.Mask",
"F.Paste"
],
"thermal": false,
"pin": "16",
"name": "VCC",
"type": "power_in",
"description": "Positive supply voltage. Operating range 3.2 V to 6 V (typ 5 V); absolute max 6.5 V. Bypass with a local 0.1 µF ceramic capacitor to GND.",
"is_pin1": false,
"source": {
"geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",
"meaning": "page.json:component.pins",
"correspondence": "kicad: symbol pin number == pad name"
}
}
]
}