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74HC595DMT

HGSEMI · Shift Registers · TSSOP-16

74HC595DMT from HGSEMI, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q1 tri_state Parallel data output 1 (3-state storage register output).
2 Q2 tri_state Parallel data output 2 (3-state storage register output).
3 Q3 tri_state Parallel data output 3 (3-state storage register output).
4 Q4 tri_state Parallel data output 4 (3-state storage register output).
5 Q5 tri_state Parallel data output 5 (3-state storage register output).
6 Q6 tri_state Parallel data output 6 (3-state storage register output).
7 Q7 tri_state Parallel data output 7 (3-state storage register output).
8 GND power_in Ground (0V).
9 Q7S output Serial data output for cascading; absolute maximum output current ±25 mA.
10 MR input Master reset, active LOW; a LOW resets the shift register.
11 SHCP input Shift register clock input; data shifts on LOW-to-HIGH transitions.
12 STCP input Storage register clock input; shift register data transfers to storage register on LOW-to-HIGH transition.
13 OE input Output enable input, active LOW; HIGH puts the Qn outputs in high-impedance OFF-state.
14 DS input Serial data input.
15 Q0 tri_state Parallel data output 0 (3-state storage register output).
16 VCC power_in Supply voltage, recommended operating range 2.0 V to 6.0 V (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer HGSEMI
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 6
Input clamping current IIK 20 mA VI < -0.5V or VI > VCC+0.5V; printed ±20 6
Output clamping current IOK 20 mA VO < -0.5V or VO > VCC+0.5V; printed ±20 6
Output current pin Q7S IO 25 mA VO=-0.5V to (VCC+0.5V); pin Q7S; printed ±25 6
Output current pins Qn IO 35 mA VO=-0.5V to (VCC+0.5V); pins Qn; printed ±35 6
Supply current ICC 70 mA 6
Ground current IGND -70 mA 6
Storage temperature Tstg -65 150 ℃ 6
Total power dissipation Ptot 500 mW 6
Soldering temperature TL 260 ℃ 10s 6
Supply voltage VCC 2 5 6 V 6
Input voltage VI 0 V max printed as VCC 6
Output voltage VO 0 V max printed as VCC 6
Ambient temperature Tamb -40 85 ℃ 6
HIGH-level input voltage VIH 1.5 1.2 V VCC=2.0V 7
HIGH-level input voltage VIH 3.15 2.4 V VCC=4.5V 7
HIGH-level input voltage VIH 4.2 3.2 V VCC=6.0V 7
LOW-level input voltage VIL 0.8 0.5 V VCC=2.0V 7
LOW-level input voltage VIL 1.35 1 V VCC=4.5V 7
LOW-level input voltage VIL 1.8 1.5 V VCC=6.0V 7
HIGH-level output voltage VOH 1.9 2 V VI=VIH or VIL; all outputs; IO=-20uA; VCC=2.0V 7
HIGH-level output voltage VOH 4.4 4.5 V VI=VIH or VIL; all outputs; IO=-20uA; VCC=4.5V 7
HIGH-level output voltage VOH 5.9 6 V VI=VIH or VIL; all outputs; IO=-20uA; VCC=6.0V 7
HIGH-level output voltage Q7S VOH 3.84 4.32 V VI=VIH or VIL; Q7S output; IO=-4.0mA; VCC=4.5V 7
HIGH-level output voltage Q7S VOH 5.34 5.81 V VI=VIH or VIL; Q7S output; IO=-5.2mA; VCC=6.0V 7
HIGH-level output voltage Qn VOH 3.84 4.32 V VI=VIH or VIL; Qn bus driver outputs; IO=-6.0mA; VCC=4.5V 7
HIGH-level output voltage Qn VOH 5.34 5.81 V VI=VIH or VIL; Qn bus driver outputs; IO=-7.8mA; VCC=6.0V 7
LOW-level output voltage VOL 0 0.1 V VI=VIH or VIL; all outputs; IO=20uA; VCC=2.0V 7
LOW-level output voltage Q7S VOL 0.15 0.33 V VI=VIH or VIL; Q7S output; IO=4.0mA; VCC=4.5V 7
LOW-level output voltage Q7S VOL 0.16 0.33 V VI=VIH or VIL; Q7S output; IO=5.2mA; VCC=6.0V 7
LOW-level output voltage Qn VOL 0.15 0.33 V VI=VIH or VIL; Qn bus driver outputs; IO=6.0mA; VCC=4.5V 7
LOW-level output voltage Qn VOL 0.16 0.33 V VI=VIH or VIL; Qn bus driver outputs; IO=7.8mA; VCC=6.0V 7
Input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V; printed ±1.0 7
OFF-state output current IOZ -5 5 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND; printed ±5.0 7
Supply current ICC 80 uA VI=VCC or GND; IO=0A; VCC=6.0V 7
Input capacitance CI 3.5 pF 7
Propagation delay SHCP to Q7S tPLH, tPHL 200 ns SHCP to Q7S; VCC=2.0V 10
Propagation delay SHCP to Q7S tPLH, tPHL 40 ns SHCP to Q7S; VCC=4.5V 10
Propagation delay SHCP to Q7S tPLH, tPHL 34 ns SHCP to Q7S; VCC=6.0V 10
Propagation delay STCP to Qn tPLH, tPHL 220 ns STCP to Qn; VCC=2.0V 10
Propagation delay STCP to Qn tPLH, tPHL 44 ns STCP to Qn; VCC=4.5V 10
Propagation delay STCP to Qn tPLH, tPHL 37 ns STCP to Qn; VCC=6.0V 10
Propagation delay MR to Q7S tPHL 44 ns MR to Q7S; VCC=4.5V 10
OE to Qn enable time tPZH, tPZL 38 ns VCC=4.5V 10
OE to Qn disable time tPLZ, tPHZ 38 ns VCC=4.5V 10
Pulse width SHCP HIGH or LOW tW 19 ns SHCP HIGH or LOW; VCC=4.5V 10
Pulse width STCP HIGH or LOW tW 19 ns STCP HIGH or LOW; VCC=4.5V 10
Pulse width MR LOW tW 19 ns MR LOW; VCC=4.5V 10
Set-up time DS to SHCP tsu 13 ns DS to SHCP; VCC=4.5V 10
Set-up time SHCP to STCP tsu 19 ns SHCP to STCP; VCC=4.5V 10
Hold time DS to SHCP th 3 ns VCC=4.5V 10
Recovery time MR to SHCP trec 13 ns VCC=4.5V 10
Maximum frequency fmax 4.8 MHz SHCP or STCP; VCC=2.0V 10
Maximum frequency fmax 24 MHz SHCP or STCP; VCC=4.5V 10
Maximum frequency fmax 28 MHz SHCP or STCP; VCC=6.0V 10

CAD (KiCad official)

  • Symbol: 74HC595DMT
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc595dmt-etched.step / 74hc595dmt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc595dmt.step / 74hc595dmt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (19 pp, sha256 4656a40eb7d36432, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF