74HC595D

{
  "slug": "74hc595d",
  "version": "0.2.1",
  "type": "component",
  "description": "Nexperia Shifting Register, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "led-drv",
    "74hc595d"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74hc595d.kicad_sym",
    "74hc595d.kicad_mod",
    "74hc595d.glb",
    "74hc595d.step",
    "74hc595d-etched.step",
    "74hc595d.lbr",
    "docs/hero.png",
    "docs/74hc595d-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "pads.json",
    "74hc595d-hero.glb",
    "74hc595d-hero.overlay.json"
  ],
  "component": {
    "mpn": "74HC595D",
    "manufacturer": "JSMSEMI",
    "package": "SOP-16",
    "pin_count": 16,
    "category": "LED-drv",
    "subcategory": "LED Display Drivers",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74HC595D.pdf",
    "parts": {
      "symbol": "74hc595d.kicad_sym",
      "footprint": "74hc595d.kicad_mod",
      "model_3d": "74hc595d-hero.glb",
      "model_3d_plain": "74hc595d.glb",
      "model_3d_step": "74hc595d-etched.step",
      "model_3d_step_plain": "74hc595d.step",
      "lbr": "74hc595d.lbr"
    },
    "distributor_links": {
      "lcsc": "C5144558"
    },
    "pins": [
      {
        "number": "1",
        "name": "Q1",
        "type": "output",
        "description": "Parallel data output bit 1 from the 8-bit storage register. 3-state output; goes to high-impedance when OE is HIGH. Drive capability approximately ±6 mA at VCC = 4.5 V."
      },
      {
        "number": "2",
        "name": "Q2",
        "type": "output",
        "description": "Parallel data output bit 2 from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "3",
        "name": "Q3",
        "type": "output",
        "description": "Parallel data output bit 3 from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "4",
        "name": "Q4",
        "type": "output",
        "description": "Parallel data output bit 4 from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "5",
        "name": "Q5",
        "type": "output",
        "description": "Parallel data output bit 5 from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "6",
        "name": "Q6",
        "type": "output",
        "description": "Parallel data output bit 6 from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "7",
        "name": "Q7",
        "type": "output",
        "description": "Parallel data output bit 7 (MSB) from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V)."
      },
      {
        "number": "9",
        "name": "Q7S",
        "type": "output",
        "description": "Serial data output tapped from the last stage of the shift register (not 3-state); used to cascade multiple 74HC595 devices. Drive capability approximately ±4 mA at VCC = 4.5 V."
      },
      {
        "number": "10",
        "name": "MR",
        "type": "input",
        "description": "Master reset, active LOW. Asynchronously clears the 8-bit shift register only (does not clear the storage register). Must be held HIGH during normal shifting."
      },
      {
        "number": "11",
        "name": "SHCP",
        "type": "input",
        "description": "Shift register clock input. Data on DS is shifted into the shift register on the LOW-to-HIGH transition of SHCP."
      },
      {
        "number": "12",
        "name": "STCP",
        "type": "input",
        "description": "Storage register clock (latch) input. On the LOW-to-HIGH transition, the contents of the shift register are transferred to the 8-bit storage register (parallel outputs)."
      },
      {
        "number": "13",
        "name": "OE",
        "type": "input",
        "description": "Output enable, active LOW. When HIGH, parallel outputs Q0..Q7 go to high-impedance OFF-state. Does not affect Q7S or the register contents."
      },
      {
        "number": "14",
        "name": "DS",
        "type": "input",
        "description": "Serial data input. Sampled on the LOW-to-HIGH transition of SHCP and shifted into stage 0 of the shift register."
      },
      {
        "number": "15",
        "name": "Q0",
        "type": "output",
        "description": "Parallel data output bit 0 (LSB) from the 8-bit storage register. 3-state output; high-impedance when OE is HIGH."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage. Operating range 2.0 V to 6.0 V (74HC595); recommended typical 5.0 V. Bypass with a 100 nF ceramic capacitor to GND close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/74HC595D.pdf",
        "pages": 21,
        "sha256": "fa24207e780cd8c4",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74HC595",
      "logic_family": "74HC",
      "function_code": "595",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit SIPO Shift Register with Output Latch",
      "manufacturer": null,
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "74hc595d.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74hc595d-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          9.9,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "0179800085b12920860af1d5fafd7b7a2a1619ef030775b5c312923855ce3385",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "title": "74HC595D",
  "brief": "JSMSEMI LED Display Drivers, SOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "metadata": {
    "specs": {
      "Manufacturer": "Unknown",
      "Package": "SOP-16",
      "Category": "LED-drv",
      "Pins": "16"
    }
  },
  "discovery_triggers": [
    "74hc595d"
  ],
  "discovery_pitch": "74HC595D (Unknown) component page with datasheet-verified CAD.",
  "visibility": "public"
}