74HC595A

{
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  "type": "component",
  "slug": "74hc595a",
  "title": "74HC595A",
  "brief": "Shenzhen Fuman Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "74hc595a"
  ],
  "component": {
    "mpn": "74HC595A",
    "manufacturer": "Shenzhen Fuman",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shifting Register",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/41719456ff854b83a31aac6011b9a5a6.pdf",
    "parts": {
      "symbol": "74hc595a.kicad_sym",
      "footprint": "74hc595a.kicad_mod",
      "model_3d": "74hc595a-etched.glb",
      "model_3d_plain": "74hc595a.glb",
      "model_3d_step": "74hc595a-etched.step",
      "model_3d_step_plain": "74hc595a.step",
      "lbr": "74hc595a.lbr"
    },
    "distributor_links": {
      "lcsc": "C110383"
    },
    "pins": [
      {
        "number": "1",
        "name": "Q1",
        "type": "output",
        "description": "Parallel data output bit 1 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V for direct LED drive."
      },
      {
        "number": "2",
        "name": "Q2",
        "type": "output",
        "description": "Parallel data output bit 2 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "3",
        "name": "Q3",
        "type": "output",
        "description": "Parallel data output bit 3 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "4",
        "name": "Q4",
        "type": "output",
        "description": "Parallel data output bit 4 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "5",
        "name": "Q5",
        "type": "output",
        "description": "Parallel data output bit 5 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "6",
        "name": "Q6",
        "type": "output",
        "description": "Parallel data output bit 6 from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "7",
        "name": "Q7",
        "type": "output",
        "description": "Parallel data output bit 7 (MSB) from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Logic ground reference (0 V). Common return for VDD and all output sink currents."
      },
      {
        "number": "9",
        "name": "Q7'",
        "type": "output",
        "description": "Serial data output (last stage of the 8-bit shift register). Used to cascade multiple 74HC595A devices; drive capability IOH7=-20 to -32 mA, IOL7=20 to 32 mA at VDD=5.0 V."
      },
      {
        "number": "10",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect. Leave floating; the datasheet marks this pin as 悬空脚 (unconnected)."
      },
      {
        "number": "11",
        "name": "SCK",
        "type": "input",
        "description": "Shift-register clock input. Data on SER is shifted into the 8-bit shift register on the rising edge of SCK. Maximum fCLOCK ~30 MHz at VDD=5.0 V."
      },
      {
        "number": "12",
        "name": "RCK",
        "type": "input",
        "description": "Storage-register (latch) clock input. While RCK is high, the shift-register contents are transferred to the storage register that drives Q0-Q7."
      },
      {
        "number": "13",
        "name": "NC",
        "type": "unconnected",
        "description": "No connect. Leave floating; the datasheet marks this pin as 悬空脚 (unconnected)."
      },
      {
        "number": "14",
        "name": "SER",
        "type": "input",
        "description": "Serial data input to the 8-bit shift register. Data is sampled and shifted on the rising edge of SCK. VIH >= 3.2 V, VIL <= 1.8 V at VDD=5.0 V."
      },
      {
        "number": "15",
        "name": "Q0",
        "type": "output",
        "description": "Parallel data output bit 0 (LSB) from the 8-bit storage register. Low-level / high-impedance output; sinks 63-75 mA typical at VDD=5.0 V."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Logic supply voltage. Operating range 3.0-5.5 V (typical 5.0 V); absolute maximum 7.0 V. Bypass locally to GND with a 0.1 uF ceramic capacitor."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/41719456ff854b83a31aac6011b9a5a6.pdf",
        "pages": 5,
        "sha256": "7839357fddf4f4ef",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.475,
        -4.445
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74HC595",
      "logic_family": "74HC",
      "function_code": "595",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit SIPO Shift Register with Output Latch",
      "manufacturer": null,
      "is_specialty": false
    },
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d5eeddb4c0b304dc61950919b126fc61d7586abd5f16ab71a2a79759ec6498bf",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74hc595a-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          9.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ca404f3dbde1e7da8c56c0e2b06ce989224a93d163862bd893647ec3d10130e0",
        "checked": "2026-10-21",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Shenzhen Fuman",
      "Package": "SOIC-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "sections": [
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    "viewers",
    "readme",
    "breadcrumbs",
    "info"
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  "discovery_triggers": [
    "74hc595a"
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  "discovery_pitch": "74HC595A (Shenzhen Fuman) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
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    "74hc595a.kicad_sym",
    "74hc595a.kicad_mod",
    "74hc595a.glb",
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    "74hc595a-etched.step",
    "74hc595a.lbr",
    "docs/hero.png",
    "docs/74hc595a-datasheet.pdf",
    "viewers/symbol.html",
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  "visibility": {
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  "updated_at": "2026-09-24T15:02:34.299Z"
}