component
74HC574TS
Public Made by Adomby adom
GR Flip Flops, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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74HC574TS
GR · Flip Flops · SOIC-20-300mil
74HC574TS from GR, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE# | input | Active-low output enable: when low all Q outputs are push-pull, and when high all Q outputs are forced to high impedance (Z). |
| 2 | 1D | input | Data input 1D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 3 | 2D | input | Data input 2D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 4 | 3D | input | Data input 3D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 5 | 4D | input | Data input 4D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 6 | 5D | input | Data input 5D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 7 | 6D | input | Data input 6D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 8 | 7D | input | Data input 7D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 9 | 8D | input | Data input 8D, loaded into the flip-flop on the rising edge of CLK; input current is limited to ≤1 µA at VCC = 6 V and input voltage must stay between -0.5 V and VCC+0.5 V. |
| 10 | GND | power_in | Ground reference; continuous current through GND is limited to ±70 mA (absolute maximum). |
| 11 | CLK | input | Clock input; the D data are captured on the rising edge (the timing table labels this signal LE). |
| 12 | 8Q | tri_state | Three-state output 8Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 13 | 7Q | tri_state | Three-state output 7Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 14 | 6Q | tri_state | Three-state output 6Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 15 | 5Q | tri_state | Three-state output 5Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 16 | 4Q | tri_state | Three-state output 4Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 17 | 3Q | tri_state | Three-state output 3Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 18 | 2Q | tri_state | Three-state output 2Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 19 | 1Q | tri_state | Three-state output 1Q, push-pull when OE# is low and high impedance when OE# is high; continuous output current is limited to ±35 mA. |
| 20 | VCC | power_in | Positive supply; recommended operating range is 2 V to 6 V (absolute maximum -0.5 V to 6.5 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 6.5 | V | 2 | ||
| Input/output voltage | VIN、VOUT | -0.5 | V | 2 | |||
| Input/output clamp current | IIK、IOK | -20 | 20 | mA | 2 | ||
| Continuous output current per pin | IOUT | -35 | 35 | mA | 2 | ||
| Continuous current through VCC or GND | ICC、IGND | -70 | 70 | mA | 2 | ||
| Power dissipation | PD | 500 | mW | 2 | |||
| Operating temperature | TA | 0 | 70 | ℃ | 2 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 2 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10s | 2 | ||
| Operating supply voltage | VCC | 2 | 5 | 6 | V | 3 | |
| Input/output voltage (operating) | VIN、Vout | 0 | V | 3 | |||
| Input rise/fall time | tr、tf | 0 | 1000 | ns | VCC=2.0V | 3 | |
| Input rise/fall time | tr、tf | 0 | 500 | ns | VCC=4.5V | 3 | |
| Input rise/fall time | tr、tf | 0 | 400 | ns | VCC=6.0V | 3 | |
| High-level input voltage | VIH | 1.5 | V | TA=25℃; VCC=2.0V | 3 | ||
| High-level input voltage | VIH | 3.15 | V | TA=25℃; VCC=4.5V | 3 | ||
| High-level input voltage | VIH | 4.2 | V | TA=25℃; VCC=6.0V | 3 | ||
| Low-level input voltage | VIL | 0.5 | V | TA=25℃; VCC=2.0V | 3 | ||
| Low-level input voltage | VIL | 1.35 | V | TA=25℃; VCC=4.5V | 3 | ||
| Low-level input voltage | VIL | 1.8 | V | TA=25℃; VCC=6.0V | 3 | ||
| High-level output voltage | VOH | 1.9 | V | TA=25℃; VI=VIH or VIL; IOH=20µA; VCC=2.0V | 3 | ||
| High-level output voltage | VOH | 4.4 | V | TA=25℃; VI=VIH or VIL; IOH=20µA; VCC=4.5V | 3 | ||
| High-level output voltage | VOH | 5.9 | V | TA=25℃; VI=VIH or VIL; IOH=20µA; VCC=6.0V | 3 | ||
| High-level output voltage | VOH | 4 | 4.4 | V | TA=25℃; VI=VIH or VIL; IOH=6.0mA; VCC=4.5V | 3 | |
| High-level output voltage | VOH | 5.5 | 5.9 | V | TA=25℃; VI=VIH or VIL; IOH=7.8mA; VCC=6.0V | 3 | |
| Low-level output voltage | VOL | 0.1 | V | TA=25℃; VI=VIH or VIL; IOL=20µA; VCC=2.0V | 3 | ||
| Low-level output voltage | VOL | 0.07 | 0.3 | V | TA=25℃; VI=VIH or VIL; IOL=6.0mA; VCC=4.5V | 3 | |
| Low-level output voltage | VOL | 0.08 | 0.3 | V | TA=25℃; VI=VIH or VIL; IOL=7.8mA; VCC=6.0V | 3 | |
| Input current | IIN | -1 | 1 | uA | TA=25℃; VI=VCC or GND; VCC=6.0V | 3 | |
| Output leakage current | IOZ | -5 | 5 | uA | TA=25℃; VO=VCC or GND; VCC=6.0V | 3 | |
| Quiescent supply current | ICC | 0.2 | 10 | uA | TA=25℃; VI=VCC or GND; IOUT=0µA; VCC=6.0V | 3 | |
| Operating supply voltage (DC table) | VCC | 2 | 6 | V | 3 | ||
| Pulse width, LE high | tW | 80 | ns | Ta=25℃; CL=47pF, tr=tf≤20ns; VCC=2.0V | 4 |
CAD (KiCad official)
- Symbol:
74HC574TS - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
74hc574ts-etched.step/74hc574ts-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc574ts.step/74hc574ts.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (6 pp, sha256
7a4a400c8273f447, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).