# 74HC541D

**Nexperia** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-300mil

74HC541D from Nexperia, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-LOW output enable input; a HIGH on OE1 forces outputs Y0 to Y7 to the high-impedance OFF-state when OE2 is also not LOW (Table 3). |
| 2 | A0 | input | Data input to buffer channel 0; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 3 | A1 | input | Data input to buffer channel 1; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 4 | A2 | input | Data input to buffer channel 2; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 5 | A3 | input | Data input to buffer channel 3; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 6 | A4 | input | Data input to buffer channel 4; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 7 | A5 | input | Data input to buffer channel 5; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 8 | A6 | input | Data input to buffer channel 6; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 9 | A7 | input | Data input to buffer channel 7; inputs have clamp diodes allowing current-limiting resistors for interfacing to voltages above VCC, with input voltage specified from 0 V to VCC. |
| 10 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 11 | Y7 | tri_state | Non-inverting 3-state data output of channel 7; enters high-impedance OFF-state when OE1 is HIGH or OE2 is LOW-disabled per the functional table, and output current is limited to ±35 mA. |
| 12 | Y6 | tri_state | Non-inverting 3-state data output of channel 6; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 13 | Y5 | tri_state | Non-inverting 3-state data output of channel 5; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 14 | Y4 | tri_state | Non-inverting 3-state data output of channel 4; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 15 | Y3 | tri_state | Non-inverting 3-state data output of channel 3; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 16 | Y2 | tri_state | Non-inverting 3-state data output of channel 2; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 17 | Y1 | tri_state | Non-inverting 3-state data output of channel 1; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 18 | Y0 | tri_state | Non-inverting 3-state data output of channel 0; enters high-impedance OFF-state when disabled by OE1/OE2, with output current limited to ±35 mA. |
| 19 | OE2 | input | Active-LOW output enable input; a HIGH on OE2 forces outputs Y0 to Y7 to the high-impedance OFF-state when OE1 is also not LOW (Table 3). |
| 20 | VCC | power_in | Supply voltage; 2.0 V to 6.0 V for 74HC541 (absolute maximum 7 V, -0.5 V to +7 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-20-300mil |
| Category | Logic |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `74HC541D`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `74hc541d-etched.step` / `74hc541d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc541d.step` / `74hc541d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884619026976768) (14 pp, sha256 `1365fecc10aa88a3`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hc541d-datasheet.pdf)