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74HC4053D-Q100

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Nexperia Analog Switches, Multiplexers, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC4053D-Q100

Nexperia · Analog Switches, Multiplexers · SO-16

74HC4053D-Q100 from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 2Y1 passive Independent input/output of switch 2, connected to 2Z when E is LOW and S2 is HIGH, with switch voltage limited to the VEE to VCC range.
2 2Y0 passive Independent input/output of switch 2, connected to 2Z when E is LOW and S2 is LOW, with switch voltage limited to the VEE to VCC range.
3 3Y1 passive Independent input/output of switch 3, connected to 3Z when E is LOW and S3 is HIGH, with switch voltage limited to the VEE to VCC range.
4 3Z passive Common input/output of switch 3; per the datasheet, voltages at nYn and nZ may not exceed VCC or VEE when switch current flows into nZ.
5 3Y0 passive Independent input/output of switch 3, connected to 3Z when E is LOW and S3 is LOW, with switch voltage limited to the VEE to VCC range.
6 E input Digital enable input, active LOW; when HIGH all switches are turned off, and input voltage must stay between GND and VCC.
7 VEE power_in Negative supply voltage for the analog switches; VCC - VEE must be between 2.0 V and 10.0 V (74HC) per the recommended operating conditions.
8 GND power_in Ground supply voltage; all voltages are referenced to VSS = 0 V (ground), and VCC - GND must be between 2.0 V and 10.0 V for the 74HC variant.
9 S3 input Select input for switch 3; LOW selects 3Y0 and HIGH selects 3Y1 when E is LOW, with input voltage between GND and VCC.
10 S2 input Select input for switch 2; LOW selects 2Y0 and HIGH selects 2Y1 when E is LOW, with input voltage between GND and VCC.
11 S1 input Select input for switch 1; LOW selects 1Y0 and HIGH selects 1Y1 when E is LOW, with input voltage between GND and VCC.
12 1Y0 passive Independent input/output of switch 1, connected to 1Z when E is LOW and S1 is LOW, with switch voltage limited to the VEE to VCC range.
13 1Y1 passive Independent input/output of switch 1, connected to 1Z when E is LOW and S1 is HIGH, with switch voltage limited to the VEE to VCC range.
14 1Z passive Common input/output of switch 1; per the datasheet, voltages at nYn and nZ may not exceed VCC or VEE when switch current flows into nZ.
15 2Z passive Common input/output of switch 2; per the datasheet, voltages at nYn and nZ may not exceed VCC or VEE when switch current flows into nZ.
16 VCC power_in Positive supply voltage; VCC - GND must be between 2.0 V and 10.0 V for the 74HC variant, with an absolute maximum of -0.5 V to +11.0 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SO-16
Category Interface
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 11 V 5
input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 5
switch clamping current ISK -20 20 mA VSW < -0.5 V or VSW > VCC + 0.5 V 5
switch current ISW -25 25 mA -0.5 V < VSW < VCC + 0.5 V 5
supply current IEE -20 20 mA 5
supply current ICC 50 mA 5
ground current IGND -50 mA 5
storage temperature Tstg -65 150 °C 5
power dissipation per switch P 100 mW 5
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C; SOT109-1 (SO16) 5
supply voltage (VCC - GND) VCC - GND 2 5 10 V see Fig. 5 and Fig. 6 5
supply voltage (VCC - VEE) VCC - VEE 2 5 10 V see Fig. 5 and Fig. 6 5
ambient temperature Tamb -40 25 125 °C 5
input transition rise and fall rate Δt/ΔV 625 ns/V VCC = 2.0 V 5
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 5
input transition rise and fall rate Δt/ΔV 83 ns/V VCC = 6.0 V 5
input transition rise and fall rate Δt/ΔV 31 ns/V VCC = 10.0 V 5
HIGH-level input voltage VIH 1.5 V Tamb = -40 °C to +125 °C; VCC = 2.0 V 9
HIGH-level input voltage VIH 3.15 V Tamb = -40 °C to +125 °C; VCC = 4.5 V 9
HIGH-level input voltage VIH 4.2 V Tamb = -40 °C to +125 °C; VCC = 6.0 V 9
HIGH-level input voltage VIH 6.3 V Tamb = -40 °C to +125 °C; VCC = 9.0 V 9
LOW-level input voltage VIL 0.5 V Tamb = -40 °C to +125 °C; VCC = 2.0 V 9
LOW-level input voltage VIL 1.35 V Tamb = -40 °C to +125 °C; VCC = 4.5 V 9
LOW-level input voltage VIL 1.8 V Tamb = -40 °C to +125 °C; VCC = 6.0 V 9
LOW-level input voltage VIL 2.7 V Tamb = -40 °C to +125 °C; VCC = 9.0 V 9
input leakage current II -1 1 μA Tamb = -40 °C to +125 °C; VEE = 0 V; VI = VCC or GND; VCC = 6.0 V 9
input leakage current II -2 2 μA Tamb = -40 °C to +125 °C; VEE = 0 V; VI = VCC or GND; VCC = 10.0 V 9
OFF-state leakage current, per channel IS(OFF) -1 1 μA Tamb = -40 °C to +125 °C; VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; /VSW/ = VCC - VEE; see Fig. 9; per channel 9
OFF-state leakage current, all channels IS(OFF) -1 1 μA Tamb = -40 °C to +125 °C; VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; /VSW/ = VCC - VEE; see Fig. 9 (block conditions) 9
ON-state leakage current IS(ON) -1 1 μA Tamb = -40 °C to +125 °C; VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; /VSW/ = VCC - VEE; see Fig. 10 9
supply current ICC 160 μA Tamb = -40 °C to +125 °C; VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE; VCC = 6.0 V 10
supply current ICC 320 μA Tamb = -40 °C to +125 °C; VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE; VCC = 10.0 V 10
HIGH-level input voltage VIH 1.5 1.2 V Tamb = 25 °C; VCC = 2.0 V 8
HIGH-level input voltage VIH 3.15 2.4 V Tamb = 25 °C; VCC = 4.5 V 8
HIGH-level input voltage VIH 4.2 3.2 V Tamb = 25 °C; VCC = 6.0 V 8
HIGH-level input voltage VIH 6.3 4.7 V Tamb = 25 °C; VCC = 9.0 V 8
LOW-level input voltage VIL 0.8 0.5 V Tamb = 25 °C; VCC = 2.0 V 8
LOW-level input voltage VIL 2.1 1.35 V Tamb = 25 °C; VCC = 4.5 V 8
LOW-level input voltage VIL 2.8 1.8 V Tamb = 25 °C; VCC = 6.0 V 8
LOW-level input voltage VIL 4.3 2.7 V Tamb = 25 °C; VCC = 9.0 V 8
input leakage current II -0.1 0.1 μA Tamb = 25 °C; VEE = 0 V; VI = VCC or GND; VCC = 6.0 V 8
input leakage current II -0.2 0.2 μA Tamb = 25 °C; VEE = 0 V; VI = VCC or GND; VCC = 10.0 V 8
OFF-state leakage current, per channel IS(OFF) -0.1 0.1 μA Tamb = 25 °C; VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; /VSW/ = VCC - VEE; see Fig. 9; per channel 8
OFF-state leakage current, all channels IS(OFF) -0.1 0.1 μA Tamb = 25 °C; VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; /VSW/ = VCC - VEE; see Fig. 9 (block conditions) 8
ON-state leakage current IS(ON) -0.1 0.1 μA Tamb = 25 °C; VCC = 10.0 V; VEE = 0 V; VI = VIH or VIL; /VSW/ = VCC - VEE; see Fig. 10 8
supply current ICC 8 μA Tamb = 25 °C; VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE; VCC = 6.0 V 8
supply current ICC 16 μA Tamb = 25 °C; VEE = 0 V; VI = VCC or GND; Vis = VEE or VCC; Vos = VCC or VEE; VCC = 10.0 V 8
ON resistance (peak) RON(peak) 270 Ω Tamb = -40 °C to +125 °C; Vis = VCC to VEE; VCC = 4.5 V; VEE = 0 V; ISW = 1000 μA 7
ON resistance (peak) RON(peak) 240 Ω Tamb = -40 °C to +125 °C; Vis = VCC to VEE; VCC = 6.0 V; VEE = 0 V; ISW = 1000 μA 7
ON resistance (peak) RON(peak) 195 Ω Tamb = -40 °C to +125 °C; Vis = VCC to VEE; VCC = 4.5 V; VEE = -4.5 V; ISW = 1000 μA 7
propagation delay tpd 15 60 ns Tamb = 25 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 2.0 V; VEE = 0 V 11
propagation delay tpd 5 12 ns Tamb = 25 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 4.5 V; VEE = 0 V 11
propagation delay tpd 4 10 ns Tamb = 25 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 6.0 V; VEE = 0 V 11
propagation delay tpd 4 8 ns Tamb = 25 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 4.5 V; VEE = -4.5 V 11
propagation delay tpd 90 ns Tamb = -40 °C to +125 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 2.0 V; VEE = 0 V 13
propagation delay tpd 18 ns Tamb = -40 °C to +125 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 4.5 V; VEE = 0 V 13
propagation delay tpd 15 ns Tamb = -40 °C to +125 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 6.0 V; VEE = 0 V 13
propagation delay tpd 12 ns Tamb = -40 °C to +125 °C; Vis to Vos; RL = ∞ Ω; see Fig. 11; VCC = 4.5 V; VEE = -4.5 V 13

CAD (KiCad official)

  • Symbol: 74HC4053D-Q100
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc4053d-q100-etched.step / 74hc4053d-q100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc4053d-q100.step / 74hc4053d-q100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (25 pp, sha256 b7b4f46a98278ce8, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF