74HC4052LQ

{
  "schema_version": 1,
  "type": "component",
  "slug": "74hc4052lq",
  "title": "74HC4052LQ",
  "brief": "HGSEMI Analog Switches, Multiplexers, QFN-16(3x3). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "interface",
    "74hc4052lq"
  ],
  "component": {
    "mpn": "74HC4052LQ",
    "manufacturer": "HGSEMI",
    "package": "QFN-16(3x3)",
    "pin_count": 16,
    "category": "Interface",
    "subcategory": "Analog Switches, Multiplexers",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/3fb49bebe89c0e68351071f49ea56936.pdf",
    "parts": {
      "symbol": "74hc4052lq.kicad_sym",
      "footprint": "74hc4052lq.kicad_mod",
      "model_3d": "74hc4052lq-etched.glb",
      "model_3d_plain": "74hc4052lq.glb",
      "model_3d_step": "74hc4052lq-etched.step",
      "model_3d_step_plain": "74hc4052lq.step",
      "lbr": "74hc4052lq.lbr"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "Y0B",
        "type": "bidirectional",
        "description": "Mux B independent analog I/O channel 0. Bidirectional analog switch terminal; connected to ZB when A1=L, A0=L and E=L. RON typ 80 Ω at VDD-VEE=9 V."
      },
      {
        "number": "2",
        "name": "Y2B",
        "type": "bidirectional",
        "description": "Mux B independent analog I/O channel 2. Connected to ZB when A1=H, A0=L and E=L."
      },
      {
        "number": "3",
        "name": "ZB",
        "type": "bidirectional",
        "description": "Mux B common analog I/O. Routed to one of Y0B..Y3B according to A1/A0 when E=L; high-impedance when E=H."
      },
      {
        "number": "4",
        "name": "Y3B",
        "type": "bidirectional",
        "description": "Mux B independent analog I/O channel 3. Connected to ZB when A1=H, A0=H and E=L."
      },
      {
        "number": "5",
        "name": "Y1B",
        "type": "bidirectional",
        "description": "Mux B independent analog I/O channel 1. Connected to ZB when A1=L, A0=H and E=L."
      },
      {
        "number": "6",
        "name": "E",
        "type": "input",
        "description": "Active-low common enable. When E=L, one selected channel per mux (A/B) is turned on; when E=H all switches are OFF (high impedance) regardless of A0/A1."
      },
      {
        "number": "7",
        "name": "VEE",
        "type": "power_in",
        "description": "Negative analog supply. Sets the lower rail for the analog switch pass range (VEE ≤ VI/O ≤ VDD). Typical range -6 V to 0 V; VDD-VEE ≤ 9 V recommended."
      },
      {
        "number": "8",
        "name": "VSS",
        "type": "power_in",
        "description": "Digital ground (0 V reference for A0, A1, E logic inputs). Tie to VEE when used as a purely digital 4-to-1 mux/demux."
      },
      {
        "number": "9",
        "name": "A1",
        "type": "input",
        "description": "Channel-select address bit 1 (MSB). Digital input referenced VSS..VDD; selects one of four channels per mux together with A0."
      },
      {
        "number": "10",
        "name": "A0",
        "type": "input",
        "description": "Channel-select address bit 0 (LSB). Digital input referenced VSS..VDD; selects one of four channels per mux together with A1."
      },
      {
        "number": "11",
        "name": "Y3A",
        "type": "bidirectional",
        "description": "Mux A independent analog I/O channel 3. Connected to ZA when A1=H, A0=H and E=L."
      },
      {
        "number": "12",
        "name": "Y0A",
        "type": "bidirectional",
        "description": "Mux A independent analog I/O channel 0. Connected to ZA when A1=L, A0=L and E=L."
      },
      {
        "number": "13",
        "name": "ZA",
        "type": "bidirectional",
        "description": "Mux A common analog I/O. Routed to one of Y0A..Y3A according to A1/A0 when E=L; high-impedance when E=H."
      },
      {
        "number": "14",
        "name": "Y1A",
        "type": "bidirectional",
        "description": "Mux A independent analog I/O channel 1. Connected to ZA when A1=L, A0=H and E=L."
      },
      {
        "number": "15",
        "name": "Y2A",
        "type": "bidirectional",
        "description": "Mux A independent analog I/O channel 2. Connected to ZA when A1=H, A0=L and E=L."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "Positive supply. Recommended 3.0-9.0 V (typ 5.0 V); VDD-VEE ≤ 9 V. Sets the upper rail for both the digital logic and the analog switch pass range."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/3fb49bebe89c0e68351071f49ea56936.pdf",
        "pages": 13,
        "sha256": "c10511caf4ff602c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC4052",
      "logic_family": "74HC",
      "function_code": "4052",
      "function_class": "Multiplexer",
      "function_name": "Dual 4-Channel Analog Mux/Demux",
      "manufacturer": null,
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "74hc4052lq.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          3.0,
          0.9
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "4bafaf1bb48873ff43b364918bf5e1f4278a211ad76791ed7928096d98c1768a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74hc4052lq-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.0,
          3.0,
          0.9
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ad43d3556cd0de22e102e6bc68c966c95c9dda84208ca56e154eca5916948132",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "HGSEMI",
      "Package": "QFN-16(3x3)",
      "Category": "Interface",
      "Pins": "16"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "74hc4052lq"
  ],
  "discovery_pitch": "74HC4052LQ (HGSEMI) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74hc4052lq.kicad_sym",
    "74hc4052lq.kicad_mod",
    "74hc4052lq.glb",
    "74hc4052lq.step",
    "74hc4052lq-etched.step",
    "74hc4052lq.lbr",
    "docs/hero.png",
    "docs/74hc4052lq-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "updated_at": "2026-09-24T14:59:09.448Z"
}