74HC4051PW

@@ -0,0 +1,58 @@+# 74HC4051PW++**Nexperia** · Analog Switches, Multiplexers · TSSOP-16++74HC4051PW from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Y4 | bidirectional | Independent analog input/output channel 4. Connected to common Z when S2=H, S1=L, S0=L and E=L. Analog signal range VEE to VCC. |+| 2 | Y6 | bidirectional | Independent analog input/output channel 6. Connected to common Z when S2=H, S1=H, S0=L and E=L. Analog signal range VEE to VCC. |+| 3 | Z | bidirectional | Common analog input/output (SP8T pole). Connected to the selected Y0-Y7 channel per the S2/S1/S0 select code when enable E is LOW. |+| 4 | Y7 | bidirectional | Independent analog input/output channel 7. Connected to common Z when S2=H, S1=H, S0=H and E=L. Analog signal range VEE to VCC. |+| 5 | Y5 | bidirectional | Independent analog input/output channel 5. Connected to common Z when S2=H, S1=L, S0=H and E=L. Analog signal range VEE to VCC. |+| 6 | ~E | input | Enable input, active LOW. When LOW, the selected switch (per S0/S1/S2) is ON; when HIGH, all switches are OFF (Z is isolated from all Y channels). |+| 7 | VEE | power_in | Negative analog supply voltage rail. Sets the lower analog signal range; may be tied to GND for single-supply operation or to a negative rail (VCC-VEE up to 10 V for HC, 5.5 V-referenced for HCT). |+| 8 | GND | power_in | Ground supply voltage (0 V reference). Logic reference for the digital select and enable inputs. |+| 9 | S2 | input | Digital channel-select input bit 2 (MSB of the 3-bit S2:S0 selector). CMOS logic level referenced to VCC/GND. |+| 10 | S1 | input | Digital channel-select input bit 1. CMOS logic level referenced to VCC/GND. |+| 11 | S0 | input | Digital channel-select input bit 0 (LSB of the 3-bit S2:S0 selector). CMOS logic level referenced to VCC/GND. |+| 12 | Y3 | bidirectional | Independent analog input/output channel 3. Connected to common Z when S2=L, S1=H, S0=H and E=L. Analog signal range VEE to VCC. |+| 13 | Y0 | bidirectional | Independent analog input/output channel 0. Connected to common Z when S2=L, S1=L, S0=L and E=L. Analog signal range VEE to VCC. |+| 14 | Y1 | bidirectional | Independent analog input/output channel 1. Connected to common Z when S2=L, S1=L, S0=H and E=L. Analog signal range VEE to VCC. |+| 15 | Y2 | bidirectional | Independent analog input/output channel 2. Connected to common Z when S2=L, S1=H, S0=L and E=L. Analog signal range VEE to VCC. |+| 16 | VCC | power_in | Positive supply voltage. 2.0-10.0 V for 74HC4051; 4.5-5.5 V for 74HCT4051. Also sets the upper analog signal range with VEE. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | TSSOP-16 |+| Category | Interface |+| Pins | 16 |++## Ordering variants++- `74HC4051PWPW`+- `74HC4051PWD`+- `74HC4051PWBQ`+- `74HC4051PWBZ`++## CAD (KiCad official)++- Symbol: `74HC4051PW`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74HC4051PW.pdf) (28 pp, sha256 `e5b40e804e4dea04`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74hc4051pw-datasheet.pdf)

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