component

74HC4051LQ

Public Made by Adom

by adom

HGSEMI Analog Switches, Multiplexers, QFN-16(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentinterface74hc4051lq
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

74HC4051LQ

HGSEMI · Analog Switches, Multiplexers · QFN-16(3x3)

74HC4051LQ from HGSEMI, in a QFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Y4 bidirectional Independent analog I/O channel 4. Connects to common Z pin when A2:A0 = 100 and E is low. On-resistance ~50-350 Ω depending on VDD-VEE.
2 Y6 bidirectional Independent analog I/O channel 6. Connects to common Z pin when A2:A0 = 110 and E is low.
3 Z bidirectional Common analog I/O. Routes to one of Y0-Y7 selected by A2:A0 when E is low. High-impedance when E is high.
4 Y7 bidirectional Independent analog I/O channel 7. Connects to common Z pin when A2:A0 = 111 and E is low.
5 Y5 bidirectional Independent analog I/O channel 5. Connects to common Z pin when A2:A0 = 101 and E is low.
6 E input Active-low enable input. When low, one Y channel is connected to Z per A2:A0; when high, all channels are turned off (high-impedance).
7 VEE power_in Negative analog supply. Range -6 V to 0 V; sets lower analog signal rail. Tie to VSS for single-supply digital multiplexer use.
8 VSS power_in Digital ground / reference for digital control inputs (A0-A2, E).
9 A2 input Address select input bit 2 (MSB). Digital logic level referenced to VDD/VSS.
10 A1 input Address select input bit 1. Digital logic level referenced to VDD/VSS.
11 A0 input Address select input bit 0 (LSB). Digital logic level referenced to VDD/VSS.
12 Y3 bidirectional Independent analog I/O channel 3. Connects to common Z pin when A2:A0 = 011 and E is low.
13 Y0 bidirectional Independent analog I/O channel 0. Connects to common Z pin when A2:A0 = 000 and E is low.
14 Y1 bidirectional Independent analog I/O channel 1. Connects to common Z pin when A2:A0 = 001 and E is low.
15 Y2 bidirectional Independent analog I/O channel 2. Connects to common Z pin when A2:A0 = 010 and E is low.
16 VDD power_in Positive supply. Operating range 3.0 V to 9.0 V (with VDD-VEE ≤ 9 V). Powers digital logic and sets upper analog signal rail.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package QFN-16(3x3)
Category Interface
Pins 16

Ordering variants

  • 74HC4051LQ/TR
  • 74HC4051LQN
  • 74HC4051LQM/TR
  • 74HC4051LQMT/TR
  • 74HC4051LQMS/TR

CAD (KiCad official)

  • Symbol: 74HC4051LQ
  • Footprint: Package_DFN_QFN:MPS_QFN-16_3x3mm_P0.5mm
  • 3D model: QFN-16(3x3) (KiCad packages3D, STEP)
  • 3D model files: 74hc4051lq-etched.step / 74hc4051lq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc4051lq.step / 74hc4051lq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (16 pp, sha256 f2f56de053e5258f, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF