# 74HC4051DRG

**HANSCHIP semiconductor** · Analog Switches, Multiplexers · SOP-16

74HC4051DRG from HANSCHIP semiconductor, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y4 | passive | Independent analog input/output channel 4 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 2 | Y6 | passive | Independent analog input/output channel 6 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 3 | Z | passive | Common analog input/output that connects to whichever Y channel is selected; it may swing between VEE and VDD and switch current is rated at ±10 mA. |
| 4 | Y7 | passive | Independent analog input/output channel 7 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 5 | Y5 | passive | Independent analog input/output channel 5 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 6 | E | input | Active-low enable input (shown with an overbar in the datasheet); when high, A0-A2 are ignored and all switches are off (high impedance), and the datasheet notes that the enable must be used to change switch states. |
| 7 | VEE | power_in | Negative supply voltage; recommended range is -6.0 V to 0 V, and it is tied to VSS when the device is used as a digital multiplexer, with VDD-VEE not to exceed 9 V. |
| 8 | VSS | power_in | Ground reference for the digital control inputs A0-A2 and E, tied to VEE when used as a digital multiplexer (usually grounded). |
| 9 | A2 | input | Channel select address input (most significant bit) that chooses one of Y0-Y7 when E is low; input range is 0 V to VDD. |
| 10 | A1 | input | Channel select address input (middle bit) that chooses one of Y0-Y7 when E is low; input range is 0 V to VDD. |
| 11 | A0 | input | Channel select address input (least significant bit) that chooses one of Y0-Y7 when E is low; input range is 0 V to VDD. |
| 12 | Y3 | passive | Independent analog input/output channel 3 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 13 | Y0 | passive | Independent analog input/output channel 0 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 14 | Y1 | passive | Independent analog input/output channel 1 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 15 | Y2 | passive | Independent analog input/output channel 2 of the 8-channel switch, which connects to common Z when selected by A0-A2 with E low; analog levels are limited to between VEE and VDD. |
| 16 | VDD | power_in | Positive supply voltage; the datasheet gives VDD-VSS of 3 V to 9 V in recommended conditions and an absolute maximum of -0.5 V to +12 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-16 |
| Category | Interface |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `74HC4051DRG`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `74hc4051drg-etched.step` / `74hc4051drg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc4051drg.step` / `74hc4051drg.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586209293645320192) (15 pp, sha256 `7296e952966e174f`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74hc4051drg-datasheet.pdf)