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74HC4040D

Public Made by Adom

by adom

Nexperia Logic ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC4040D

Nexperia · Logic ICs · SOIC-16

74HC4040D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Q11 output Counter output 11 of the 12-stage binary counter, forced LOW when MR is HIGH.
2 Q5 output Counter output 5 of the 12-stage binary counter, forced LOW when MR is HIGH.
3 Q4 output Counter output 4 of the 12-stage binary counter, forced LOW when MR is HIGH.
4 Q6 output Counter output 6 of the 12-stage binary counter, forced LOW when MR is HIGH.
5 Q3 output Counter output 3 of the 12-stage binary counter, forced LOW when MR is HIGH.
6 Q2 output Counter output 2 of the 12-stage binary counter, forced LOW when MR is HIGH.
7 Q1 output Counter output 1 of the 12-stage binary counter, forced LOW when MR is HIGH.
8 GND power_in Ground reference at 0 V; all voltages are referenced to this pin.
9 Q0 output Counter output 0 (first stage) of the 12-stage binary counter, forced LOW when MR is HIGH.
10 CP input Clock input; the counter advances on the HIGH-to-LOW transition of CP (edge-triggered).
11 MR input Active-HIGH asynchronous master reset that clears all counter stages and forces all outputs LOW independent of CP.
12 Q8 output Counter output 8 of the 12-stage binary counter, forced LOW when MR is HIGH.
13 Q7 output Counter output 7 of the 12-stage binary counter, forced LOW when MR is HIGH.
14 Q9 output Counter output 9 of the 12-stage binary counter, forced LOW when MR is HIGH.
15 Q10 output Counter output 10 of the 12-stage binary counter, forced LOW when MR is HIGH.
16 VCC power_in Positive supply voltage; 2.0 V to 6.0 V for 74HC4040 and 4.5 V to 5.5 V for 74HCT4040 per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC 2 5 6 V 6
input voltage VI 0 V 6
output voltage VO 0 V 6
ambient temperature Tamb -40 25 125 °C 6
input transition rise and fall rate Δt/ΔV 625 ns/V VCC = 2.0 V 6
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 6
input transition rise and fall rate Δt/ΔV 83 ns/V VCC = 6.0 V 6
supply voltage VCC -0.5 7 V 5
input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 5
output clamping current IOK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 5
output current IO -25 25 mA -0.5 V < VO < VCC + 0.5 V 5
supply current ICC -50 50 mA 5
ground current IGND -50 50 mA 5
storage temperature Tstg -65 150 °C 5
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 5
HIGH-level input voltage VIH 1.5 1.2 V VCC = 2.0 V; -40 °C to +125 °C 6
HIGH-level input voltage VIH 3.15 2.4 V VCC = 4.5 V; -40 °C to +125 °C 6
HIGH-level input voltage VIH 4.2 3.2 V VCC = 6.0 V; -40 °C to +125 °C 6
LOW-level input voltage VIL 0.8 0.5 V VCC = 2.0 V; -40 °C to +125 °C 6
LOW-level input voltage VIL 2.1 1.35 V VCC = 4.5 V; -40 °C to +125 °C 6
LOW-level input voltage VIL 2.8 1.8 V VCC = 6.0 V; -40 °C to +125 °C 6
HIGH-level output voltage VOH 1.9 2 V IO = -20 μA; VCC = 2.0 V; -40 °C to +125 °C 6
HIGH-level output voltage VOH 4.4 4.5 V IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C 6
HIGH-level output voltage VOH 5.9 6 V IO = -20 μA; VCC = 6.0 V; -40 °C to +125 °C 6
HIGH-level output voltage VOH 3.7 4.32 V IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 6
HIGH-level output voltage VOH 5.2 5.81 V IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C 6
LOW-level output voltage VOL 0 0.1 V IO = 20 μA; VCC = 2.0 V; -40 °C to +125 °C 6
LOW-level output voltage VOL 0.15 0.4 V IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 6
LOW-level output voltage VOL 0.16 0.4 V IO = 5.2 mA; VCC = 6.0 V; -40 °C to +125 °C 6
input leakage current II -1 1 μA VI = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C 6
supply current ICC 160 μA VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +125 °C 6
propagation delay CP to Q0 tpd 47 225 ns VCC = 2.0 V; -40 °C to +125 °C; CL = 50 pF 8
propagation delay CP to Q0 tpd 17 45 ns VCC = 4.5 V; -40 °C to +125 °C; CL = 50 pF 8
propagation delay CP to Q0 tpd 14 38 ns VCC = 6.0 V; -40 °C to +125 °C; CL = 50 pF 8
propagation delay Qn to Qn+1 tpd 28 150 ns VCC = 2.0 V; -40 °C to +125 °C; CL = 50 pF 8
propagation delay Qn to Qn+1 tpd 10 30 ns VCC = 4.5 V; -40 °C to +125 °C; CL = 50 pF 8
propagation delay Qn to Qn+1 tpd 8 26 ns VCC = 6.0 V; -40 °C to +125 °C; CL = 50 pF 8
HIGH to LOW propagation delay MR to Qn tPHL 61 280 ns VCC = 2.0 V; -40 °C to +125 °C; CL = 50 pF 8
HIGH to LOW propagation delay MR to Qn tPHL 22 56 ns VCC = 4.5 V; -40 °C to +125 °C; CL = 50 pF 8
HIGH to LOW propagation delay MR to Qn tPHL 18 48 ns VCC = 6.0 V; -40 °C to +125 °C; CL = 50 pF 8
transition time Qn tt 19 110 ns VCC = 2.0 V; -40 °C to +125 °C; CL = 50 pF 8
transition time Qn tt 7 22 ns VCC = 4.5 V; -40 °C to +125 °C; CL = 50 pF 8
transition time Qn tt 6 19 ns VCC = 6.0 V; -40 °C to +125 °C; CL = 50 pF 8
pulse width CP input HIGH or LOW tW 120 14 ns VCC = 2.0 V; -40 °C to +125 °C 8
pulse width CP input HIGH or LOW tW 24 5 ns VCC = 4.5 V; -40 °C to +125 °C 8
pulse width CP input HIGH or LOW tW 20 4 ns VCC = 6.0 V; -40 °C to +125 °C 8
pulse width MR input HIGH tW 120 22 ns VCC = 2.0 V; -40 °C to +125 °C 8
pulse width MR input HIGH tW 24 8 ns VCC = 4.5 V; -40 °C to +125 °C 8
pulse width MR input HIGH tW 20 6 ns VCC = 6.0 V; -40 °C to +125 °C 8
recovery time MR to CP trec 75 8 ns VCC = 2.0 V; -40 °C to +125 °C 8
recovery time MR to CP trec 15 3 ns VCC = 4.5 V; -40 °C to +125 °C 8
recovery time MR to CP trec 13 2 ns VCC = 6.0 V; -40 °C to +125 °C 8
maximum frequency CP input fmax 4 27 MHz VCC = 2.0 V; -40 °C to +125 °C 8
maximum frequency CP input fmax 20 82 MHz VCC = 4.5 V; -40 °C to +125 °C 8
maximum frequency CP input fmax 24 98 MHz VCC = 6.0 V; -40 °C to +125 °C 8

CAD (KiCad official)

  • Symbol: 74HC4040D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc4040d-etched.step / 74hc4040d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc4040d.step / 74hc4040d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 bf2076be00a0347d, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF