component
74HC30S
Public Made by Adomby adom
GR Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.md+14@@ -43,6 +43,20 @@ - Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm` - 3D model: SOP-14 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`74hc30s.step`](74hc30s.step) | 195 KB | You want the bare part, or you mark your own boards. |+| [`74hc30s-etched.step`](74hc30s-etched.step) | 2.0 MB | You want the part with `74HC30S` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 499 faces against 237 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "74hc30s",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+14−14@@ -4,7 +4,7 @@ "slug": "74hc30s", "title": "74HC30S", "brief": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,37 +34,37 @@ "number": "1", "name": "A", "type": "input",- "description": "NAND gate input A. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input A. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "2", "name": "B", "type": "input",- "description": "NAND gate input B. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input B. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "3", "name": "C", "type": "input",- "description": "NAND gate input C. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input C. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "4", "name": "D", "type": "input",- "description": "NAND gate input D. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input D. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "5", "name": "E", "type": "input",- "description": "NAND gate input E. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input E. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "6", "name": "F", "type": "input",- "description": "NAND gate input F. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input F. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "7",@@ -76,7 +76,7 @@ "number": "8", "name": "Y", "type": "output",- "description": "8-input NAND gate output Y = NOT(A\u00b7B\u00b7C\u00b7D\u00b7E\u00b7F\u00b7G\u00b7H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT \u00b125 mA."+ "description": "8-input NAND gate output Y = NOT(A·B·C·D·E·F·G·H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT ±25 mA." }, { "number": "9",@@ -94,13 +94,13 @@ "number": "11", "name": "G", "type": "input",- "description": "NAND gate input G. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input G. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "12", "name": "H", "type": "input",- "description": "NAND gate input H. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input H. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "13",@@ -186,9 +186,9 @@ "docs/hero.png", "docs/74hc30s-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D." }