component
74HC30S
Public Made by Adomby adom
GR Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+55@@ -0,0 +1,55 @@+# 74HC30S++**GR** · Gates · SOP-14++74HC30S from GR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | NAND gate input A. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 2 | B | input | NAND gate input B. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 3 | C | input | NAND gate input C. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 4 | D | input | NAND gate input D. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 5 | E | input | NAND gate input E. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 6 | F | input | NAND gate input F. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 7 | GND | power_in | Ground / 0 V reference for the device. |+| 8 | Y | output | 8-input NAND gate output Y = NOT(A·B·C·D·E·F·G·H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT ±25 mA. |+| 9 | NC | unconnected | No connection. Leave floating or tie to a static level. |+| 10 | NC | unconnected | No connection. Leave floating or tie to a static level. |+| 11 | G | input | NAND gate input G. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 12 | H | input | NAND gate input H. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA. |+| 13 | NC | unconnected | No connection. Leave floating or tie to a static level. |+| 14 | VCC | power_in | Positive supply. Operating range 2.0 V to 6.0 V (typ 5 V); absolute-max 6.5 V. Bypass to GND with a local ceramic capacitor near the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | GR |+| Package | SOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `74HC30SS`+- `74HC30SD`++## CAD (KiCad official)++- Symbol: `74HC30S`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [GR datasheet](docs/74hc30s-datasheet.pdf) (5 pp, sha256 `53b21b6590ca178d`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74hc30s-datasheet.pdf)
page.jsonadded+34@@ -0,0 +1,34 @@+{+ "slug": "74hc30s",+ "version": "0.1.0",+ "type": "component",+ "description": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "74hc30s"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "74hc30s.kicad_sym",+ "74hc30s.kicad_mod",+ "74hc30s.glb",+ "74hc30s.step",+ "74hc30s.lbr",+ "docs/hero.png",+ "docs/74hc30s-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "visibility": "public",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}