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74hc30s: factory component page (tier=lcsc)

Ray ·5460d23cfa ·2mo ago ·parent 26b0b67
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "74hc30s",+  "title": "74HC30S",+  "brief": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "GR Gates, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "74hc30s"   ],+  "component": {+    "mpn": "74HC30S",+    "manufacturer": "GR",+    "package": "SOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Gates",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2312261746_GR-74HC30S_C19818870.pdf",+    "parts": {+      "symbol": "74hc30s.kicad_sym",+      "footprint": "74hc30s.kicad_mod",+      "model_3d": "74hc30s.glb",+      "model_3d_step": "74hc30s.step",+      "lbr": "74hc30s.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A",+        "type": "input",+        "description": "NAND gate input A. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "2",+        "name": "B",+        "type": "input",+        "description": "NAND gate input B. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "3",+        "name": "C",+        "type": "input",+        "description": "NAND gate input C. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "4",+        "name": "D",+        "type": "input",+        "description": "NAND gate input D. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "5",+        "name": "E",+        "type": "input",+        "description": "NAND gate input E. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "6",+        "name": "F",+        "type": "input",+        "description": "NAND gate input F. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground / 0 V reference for the device."+      },+      {+        "number": "8",+        "name": "Y",+        "type": "output",+        "description": "8-input NAND gate output Y = NOT(A\u00b7B\u00b7C\u00b7D\u00b7E\u00b7F\u00b7G\u00b7H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT \u00b125 mA."+      },+      {+        "number": "9",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection. Leave floating or tie to a static level."+      },+      {+        "number": "10",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection. Leave floating or tie to a static level."+      },+      {+        "number": "11",+        "name": "G",+        "type": "input",+        "description": "NAND gate input G. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "12",+        "name": "H",+        "type": "input",+        "description": "NAND gate input H. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+      },+      {+        "number": "13",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection. Leave floating or tie to a static level."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply. Operating range 2.0 V to 6.0 V (typ 5 V); absolute-max 6.5 V. Bypass to GND with a local ceramic capacitor near the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2312261746_GR-74HC30S_C19818870.pdf",+        "pages": 5,+        "sha256": "53b21b6590ca178d",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "GR",+      "Package": "SOP-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "74hc30s"+  ],+  "discovery_pitch": "74HC30S (GR) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/74hc30s-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file