component
74HC30S
Public Made by Adomby adom
GR Gates, SOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+13−10@@ -32,37 +32,37 @@ "number": "1", "name": "A", "type": "input",- "description": "NAND gate input A. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input A. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "2", "name": "B", "type": "input",- "description": "NAND gate input B. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input B. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "3", "name": "C", "type": "input",- "description": "NAND gate input C. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input C. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "4", "name": "D", "type": "input",- "description": "NAND gate input D. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input D. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "5", "name": "E", "type": "input",- "description": "NAND gate input E. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input E. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "6", "name": "F", "type": "input",- "description": "NAND gate input F. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input F. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "7",@@ -74,7 +74,7 @@ "number": "8", "name": "Y", "type": "output",- "description": "8-input NAND gate output Y = NOT(A\u00b7B\u00b7C\u00b7D\u00b7E\u00b7F\u00b7G\u00b7H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT \u00b125 mA."+ "description": "8-input NAND gate output Y = NOT(A·B·C·D·E·F·G·H). Buffered push-pull CMOS output; sources/sinks up to 4.0 mA at VCC=4.5 V and 5.2 mA at VCC=6.0 V. Absolute-max IOUT ±25 mA." }, { "number": "9",@@ -92,13 +92,13 @@ "number": "11", "name": "G", "type": "input",- "description": "NAND gate input G. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input G. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "12", "name": "H", "type": "input",- "description": "NAND gate input H. CMOS logic input; VIH \u2265 4.2 V and VIL \u2264 1.8 V at VCC = 6 V. Input current \u2264 1 \u00b5A."+ "description": "NAND gate input H. CMOS logic input; VIH ≥ 4.2 V and VIL ≤ 1.8 V at VCC = 6 V. Input current ≤ 1 µA." }, { "number": "13",@@ -174,5 +174,8 @@ "docs/74hc30s-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }