component
74HC2G14GV
Public Made by Adomby adom
Nexperia Inverters, TSOP-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74HC2G14GV
Nexperia · Inverters · TSOP-6
74HC2G14GV from Nexperia, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input for inverter 1; the input has Schmitt-trigger behavior and clamp diodes, so a current-limiting resistor can be used to interface it to voltages above VCC. |
| 2 | GND | power_in | Ground (0 V); all voltages in the datasheet are referenced to this pin. |
| 3 | 2A | input | Data input for inverter 2; the input has Schmitt-trigger behavior and clamp diodes, so a current-limiting resistor can be used to interface it to voltages above VCC. |
| 4 | 2Y | output | Data output of inverter 2, the logic inverse of input 2A (L input gives H output, H input gives L output). |
| 5 | VCC | power_in | Supply voltage; 74HC2G14 is specified for 2.0 V to 6.0 V and 74HCT2G14 for 4.5 V to 5.5 V. |
| 6 | 1Y | output | Data output of inverter 1, the logic inverse of input 1A (L input gives H output, H input gives L output). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSOP-6 |
| Category | Logic |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 | |
| output current | IO | -25 | 25 | mA | VO = -0.5 V to VCC + 0.5 V | 3 | |
| supply current | ICC | 50 | mA | 3 | |||
| ground current | IGND | -50 | mA | 3 | |||
| storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| total power dissipation | Ptot | 250 | mW | 3 | |||
| supply voltage | VCC | 2 | 5 | 6 | V | 74HC2G14 | 3 |
| input voltage | VI | 0 | V | maximum printed as VCC | 3 | ||
| output voltage | VO | 0 | V | maximum printed as VCC | 3 | ||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 3 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | Tamb = 25 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V | 4 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | Tamb = 25 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V | 4 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | Tamb = 25 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V | 4 | |
| HIGH-level output voltage | VOH | 4.18 | 4.32 | V | Tamb = 25 °C; IO = -4.0 mA; VCC = 4.5 V | 4 | |
| HIGH-level output voltage | VOH | 5.68 | 5.81 | V | Tamb = 25 °C; IO = -5.2 mA; VCC = 6.0 V | 4 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb = 25 °C; VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V | 4 | |
| LOW-level output voltage | VOL | 0.15 | 0.26 | V | Tamb = 25 °C; IO = 4.0 mA; VCC = 4.5 V | 4 | |
| LOW-level output voltage | VOL | 0.16 | 0.26 | V | Tamb = 25 °C; IO = 5.2 mA; VCC = 6.0 V | 4 | |
| input leakage current | II | -0.1 | 0.1 | μA | Tamb = 25 °C; VI = GND or VCC; VCC = 6.0 V | 4 | |
| supply current | ICC | 1 | μA | Tamb = 25 °C; VI = GND or VCC; IO = 0 μA; VCC = 6.0 V | 4 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V | 5 | ||
| HIGH-level output voltage | VOH | 4.4 | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V | 5 | ||
| HIGH-level output voltage | VOH | 5.9 | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V | 5 | ||
| HIGH-level output voltage | VOH | 3.7 | V | Tamb = -40 °C to +125 °C; IO = -4.0 mA; VCC = 4.5 V | 5 | ||
| HIGH-level output voltage | VOH | 5.2 | V | Tamb = -40 °C to +125 °C; IO = -5.2 mA; VCC = 6.0 V | 5 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V | 5 | ||
| LOW-level output voltage | VOL | 0.4 | V | Tamb = -40 °C to +125 °C; IO = 4.0 mA; VCC = 4.5 V | 5 | ||
| input leakage current | II | -1 | 1 | μA | Tamb = -40 °C to +125 °C; VI = GND or VCC; VCC = 6.0 V | 5 | |
| supply current | ICC | 20 | μA | Tamb = -40 °C to +125 °C; VI = GND or VCC; IO = 0 μA; VCC = 6.0 V | 5 | ||
| propagation delay | tpd | 190 | ns | nA to nY; see Fig. 5; VCC = 2.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 | ||
| propagation delay | tpd | 38 | ns | nA to nY; see Fig. 5; VCC = 4.5 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 | ||
| propagation delay | tpd | 32 | ns | nA to nY; see Fig. 5; VCC = 6.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 | ||
| transition time | tt | 110 | ns | nY; see Fig. 5; VCC = 2.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 | ||
| transition time | tt | 22 | ns | nY; see Fig. 5; VCC = 4.5 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 | ||
| transition time | tt | 19 | ns | nY; see Fig. 5; VCC = 6.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 | ||
| positive-going threshold voltage | VT+ | 1 | 1.5 | V | see Fig. 7, Fig. 8; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 8 | |
| positive-going threshold voltage | VT+ | 2.3 | 3.15 | V | see Fig. 7, Fig. 8; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 8 | |
| positive-going threshold voltage | VT+ | 3 | 4.2 | V | see Fig. 7, Fig. 8; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 8 | |
| negative-going threshold voltage | VT- | 0.3 | 0.9 | V | see Fig. 7, Fig. 8; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 8 | |
| negative-going threshold voltage | VT- | 1.13 | 2 | V | see Fig. 7, Fig. 8; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 8 | |
| negative-going threshold voltage | VT- | 1.5 | 2.6 | V | see Fig. 7, Fig. 8; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 8 | |
| hysteresis voltage | VH | 0.3 | 1 | V | (VT+ - VT-); see Fig. 7, Fig. 8 and Fig. 9; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 8 | |
| hysteresis voltage | VH | 0.6 | 1.4 | V | (VT+ - VT-); see Fig. 7, Fig. 8 and Fig. 9; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 8 | |
| hysteresis voltage | VH | 0.8 | 1.7 | V | (VT+ - VT-); see Fig. 7, Fig. 8 and Fig. 9; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 8 | |
| total power dissipation derating (SOT457 package) | Ptot | 4.1 | mW/K | derates linearly above 89 °C; SOT457 (SC-74; TSOP6) package | 3 |
CAD (KiCad official)
- Symbol:
74HC2G14GV - Footprint:
Package_SO:TSOP-6_1.65x3.05mm_P0.95mm - 3D model: TSOP-6 (KiCad packages3D, STEP)
- 3D model files:
74hc2g14gv-etched.step/74hc2g14gv-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc2g14gv.step/74hc2g14gv.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
7cc56114dd5baf28, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC2G14GV
**Nexperia** · Inverters · TSOP-6
74HC2G14GV from Nexperia, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input for inverter 1; the input has Schmitt-trigger behavior and clamp diodes, so a current-limiting resistor can be used to interface it to voltages above VCC. |
| 2 | GND | power_in | Ground (0 V); all voltages in the datasheet are referenced to this pin. |
| 3 | 2A | input | Data input for inverter 2; the input has Schmitt-trigger behavior and clamp diodes, so a current-limiting resistor can be used to interface it to voltages above VCC. |
| 4 | 2Y | output | Data output of inverter 2, the logic inverse of input 2A (L input gives H output, H input gives L output). |
| 5 | VCC | power_in | Supply voltage; 74HC2G14 is specified for 2.0 V to 6.0 V and 74HCT2G14 for 4.5 V to 5.5 V. |
| 6 | 1Y | output | Data output of inverter 1, the logic inverse of input 1A (L input gives H output, H input gives L output). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSOP-6 |
| Category | Logic |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 7 | V | | 3 |
| input clamping current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 3 |
| output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 |
| output current | IO | -25 | | 25 | mA | VO = -0.5 V to VCC + 0.5 V | 3 |
| supply current | ICC | | | 50 | mA | | 3 |
| ground current | IGND | | | -50 | mA | | 3 |
| storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| total power dissipation | Ptot | | | 250 | mW | | 3 |
| supply voltage | VCC | 2 | 5 | 6 | V | 74HC2G14 | 3 |
| input voltage | VI | 0 | | | V | maximum printed as VCC | 3 |
| output voltage | VO | 0 | | | V | maximum printed as VCC | 3 |
| ambient temperature | Tamb | -40 | 25 | 125 | °C | | 3 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | Tamb = 25 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V | 4 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | Tamb = 25 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V | 4 |
| HIGH-level output voltage | VOH | 5.9 | 6 | | V | Tamb = 25 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V | 4 |
| HIGH-level output voltage | VOH | 4.18 | 4.32 | | V | Tamb = 25 °C; IO = -4.0 mA; VCC = 4.5 V | 4 |
| HIGH-level output voltage | VOH | 5.68 | 5.81 | | V | Tamb = 25 °C; IO = -5.2 mA; VCC = 6.0 V | 4 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | Tamb = 25 °C; VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V | 4 |
| LOW-level output voltage | VOL | | 0.15 | 0.26 | V | Tamb = 25 °C; IO = 4.0 mA; VCC = 4.5 V | 4 |
| LOW-level output voltage | VOL | | 0.16 | 0.26 | V | Tamb = 25 °C; IO = 5.2 mA; VCC = 6.0 V | 4 |
| input leakage current | II | -0.1 | | 0.1 | μA | Tamb = 25 °C; VI = GND or VCC; VCC = 6.0 V | 4 |
| supply current | ICC | | | 1 | μA | Tamb = 25 °C; VI = GND or VCC; IO = 0 μA; VCC = 6.0 V | 4 |
| HIGH-level output voltage | VOH | 1.9 | | | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V | 5 |
| HIGH-level output voltage | VOH | 4.4 | | | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V | 5 |
| HIGH-level output voltage | VOH | 5.9 | | | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V | 5 |
| HIGH-level output voltage | VOH | 3.7 | | | V | Tamb = -40 °C to +125 °C; IO = -4.0 mA; VCC = 4.5 V | 5 |
| HIGH-level output voltage | VOH | 5.2 | | | V | Tamb = -40 °C to +125 °C; IO = -5.2 mA; VCC = 6.0 V | 5 |
| LOW-level output voltage | VOL | | | 0.1 | V | Tamb = -40 °C to +125 °C; VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V | 5 |
| LOW-level output voltage | VOL | | | 0.4 | V | Tamb = -40 °C to +125 °C; IO = 4.0 mA; VCC = 4.5 V | 5 |
| input leakage current | II | -1 | | 1 | μA | Tamb = -40 °C to +125 °C; VI = GND or VCC; VCC = 6.0 V | 5 |
| supply current | ICC | | | 20 | μA | Tamb = -40 °C to +125 °C; VI = GND or VCC; IO = 0 μA; VCC = 6.0 V | 5 |
| propagation delay | tpd | | | 190 | ns | nA to nY; see Fig. 5; VCC = 2.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 |
| propagation delay | tpd | | | 38 | ns | nA to nY; see Fig. 5; VCC = 4.5 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 |
| propagation delay | tpd | | | 32 | ns | nA to nY; see Fig. 5; VCC = 6.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 |
| transition time | tt | | | 110 | ns | nY; see Fig. 5; VCC = 2.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 |
| transition time | tt | | | 22 | ns | nY; see Fig. 5; VCC = 4.5 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 |
| transition time | tt | | | 19 | ns | nY; see Fig. 5; VCC = 6.0 V; CL = 50 pF; Tamb = -40 °C to +125 °C | 6 |
| positive-going threshold voltage | VT+ | 1 | | 1.5 | V | see Fig. 7, Fig. 8; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 8 |
| positive-going threshold voltage | VT+ | 2.3 | | 3.15 | V | see Fig. 7, Fig. 8; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 8 |
| positive-going threshold voltage | VT+ | 3 | | 4.2 | V | see Fig. 7, Fig. 8; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 8 |
| negative-going threshold voltage | VT- | 0.3 | | 0.9 | V | see Fig. 7, Fig. 8; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 8 |
| negative-going threshold voltage | VT- | 1.13 | | 2 | V | see Fig. 7, Fig. 8; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 8 |
| negative-going threshold voltage | VT- | 1.5 | | 2.6 | V | see Fig. 7, Fig. 8; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 8 |
| hysteresis voltage | VH | 0.3 | | 1 | V | (VT+ - VT-); see Fig. 7, Fig. 8 and Fig. 9; VCC = 2.0 V; Tamb = -40 °C to +125 °C | 8 |
| hysteresis voltage | VH | 0.6 | | 1.4 | V | (VT+ - VT-); see Fig. 7, Fig. 8 and Fig. 9; VCC = 4.5 V; Tamb = -40 °C to +125 °C | 8 |
| hysteresis voltage | VH | 0.8 | | 1.7 | V | (VT+ - VT-); see Fig. 7, Fig. 8 and Fig. 9; VCC = 6.0 V; Tamb = -40 °C to +125 °C | 8 |
| total power dissipation derating (SOT457 package) | Ptot | | 4.1 | | mW/K | derates linearly above 89 °C; SOT457 (SC-74; TSOP6) package | 3 |
## CAD (KiCad official)
- Symbol: `74HC2G14GV`
- Footprint: `Package_SO:TSOP-6_1.65x3.05mm_P0.95mm`
- 3D model: TSOP-6 (KiCad packages3D, STEP)
- 3D model files: `74hc2g14gv-etched.step` / `74hc2g14gv-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc2g14gv.step` / `74hc2g14gv.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588913745078177793) (16 pp, sha256 `7cc56114dd5baf28`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc2g14gv-datasheet.pdf)