component
74HC259D
Public Made by Adomby adom
Nexperia Latches, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# 74HC259D++**Nexperia** · Latches · SOIC-16++74HC259D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A0 | input | Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode. |+| 2 | A1 | input | Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode. |+| 3 | A2 | input | Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode. |+| 4 | Q0 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 5 | Q1 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 6 | Q2 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 7 | Q3 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 8 | GND | power_in | Ground (0 V); reference potential for all signal levels. |+| 9 | Q4 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 10 | Q5 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 11 | Q6 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 12 | Q7 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |+| 13 | D | input | Data input; the logic value written to the latch addressed by A0, A1, and A2 when LE is LOW and MR is HIGH. |+| 14 | LE | input | Latch enable input (active LOW); enables data capture in addressable latch mode (when MR HIGH) or decoder mode (when MR LOW). |+| 15 | MR | input | Conditional reset input (active LOW); forces all outputs to LOW when active, regardless of data or address inputs. |+| 16 | VCC | power_in | Supply voltage; recommended operating range per JESD7A is 2.0 V to 6.0 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `74HC259D`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `74hc259d-etched.step` / `74hc259d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc259d.step` / `74hc259d.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586193254648201216) (18 pp, sha256 `51ea64638b252fa4`, retrieved 2026-09-18, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74hc259d-datasheet.pdf)
page.jsonadded+189@@ -0,0 +1,189 @@+{+ "slug": "74hc259d",+ "version": "0.1.0",+ "type": "component",+ "description": "Nexperia Latches, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "74hc259d",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "74hc259d.kicad_sym",+ "74hc259d.kicad_mod",+ "74hc259d.glb",+ "74hc259d.step",+ "74hc259d.lbr",+ "docs/hero.png",+ "docs/74hc259d-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "74HC259D",+ "manufacturer": "Nexperia",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Latches",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586193254648201216",+ "parts": {+ "symbol": "74hc259d.kicad_sym",+ "footprint": "74hc259d.kicad_mod",+ "model_3d": "74hc259d-etched.glb",+ "model_3d_plain": "74hc259d.glb",+ "model_3d_step": "74hc259d-etched.step",+ "model_3d_step_plain": "74hc259d.step",+ "lbr": "74hc259d.lbr"+ },+ "distributor_links": {+ "lcsc": "C132670"+ },+ "pins": [+ {+ "number": "1",+ "name": "A0",+ "type": "input",+ "description": "Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "input",+ "description": "Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode."+ },+ {+ "number": "3",+ "name": "A2",+ "type": "input",+ "description": "Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode."+ },+ {+ "number": "4",+ "name": "Q0",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "5",+ "name": "Q1",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "6",+ "name": "Q2",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "7",+ "name": "Q3",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground (0 V); reference potential for all signal levels."+ },+ {+ "number": "9",+ "name": "Q4",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "10",+ "name": "Q5",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "11",+ "name": "Q6",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "12",+ "name": "Q7",+ "type": "output",+ "description": "Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset)."+ },+ {+ "number": "13",+ "name": "D",+ "type": "input",+ "description": "Data input; the logic value written to the latch addressed by A0, A1, and A2 when LE is LOW and MR is HIGH."+ },+ {+ "number": "14",+ "name": "LE",+ "type": "input",+ "description": "Latch enable input (active LOW); enables data capture in addressable latch mode (when MR HIGH) or decoder mode (when MR LOW)."+ },+ {+ "number": "15",+ "name": "MR",+ "type": "input",+ "description": "Conditional reset input (active LOW); forces all outputs to LOW when active, regardless of data or address inputs."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage; recommended operating range per JESD7A is 2.0 V to 6.0 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 18,+ "cost_usd": 0.2182,+ "at": "2026-09-18T00:58:35"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586193254648201216",+ "pages": 18,+ "sha256": "51ea64638b252fa4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}