component
74HC259D
Public Made by Adomby adom
Nexperia Latches, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC259D
Nexperia · Latches · SOIC-16
74HC259D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode. |
| 2 | A1 | input | Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode. |
| 3 | A2 | input | Address input; selects which of eight latches (Q0-Q7) receives data from the D input in addressable latch mode. |
| 4 | Q0 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 5 | Q1 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 6 | Q2 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 7 | Q3 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 8 | GND | power_in | Ground (0 V); reference potential for all signal levels. |
| 9 | Q4 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 10 | Q5 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 11 | Q6 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 12 | Q7 | output | Latch output; contains stored data or the addressed D input value depending on operating mode (addressable latch, memory, decoder, or reset). |
| 13 | D | input | Data input; the logic value written to the latch addressed by A0, A1, and A2 when LE is LOW and MR is HIGH. |
| 14 | LE | input | Latch enable input (active LOW); enables data capture in addressable latch mode (when MR HIGH) or decoder mode (when MR LOW). |
| 15 | MR | input | Conditional reset input (active LOW); forces all outputs to LOW when active, regardless of data or address inputs. |
| 16 | VCC | power_in | Supply voltage; recommended operating range per JESD7A is 2.0 V to 6.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
74HC259D - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
74hc259d-etched.step/74hc259d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc259d.step/74hc259d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (18 pp, sha256
51ea64638b252fa4, retrieved 2026-09-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).