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74HC257PW

Public Made by Adom

by adom

Nexperia Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC257PW

Nexperia · Signal Switches, Multiplexers, Decoders · TSSOP-16

74HC257PW from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S input Common data select input shared by all four multiplexers; it selects the nI0 inputs when LOW and the nI1 inputs when HIGH (Table 3).
2 1I0 input Data input from source 0 for multiplexer 1; input voltage range is 0 V to VCC and the input includes a clamp diode.
3 1I1 input Data input from source 1 for multiplexer 1; input voltage range is 0 V to VCC and the input includes a clamp diode.
4 1Y tri_state 3-state multiplexer output 1; it goes to high-impedance (Z) when OE is HIGH.
5 2I0 input Data input from source 0 for multiplexer 2; input voltage range is 0 V to VCC and the input includes a clamp diode.
6 2I1 input Data input from source 1 for multiplexer 2; input voltage range is 0 V to VCC and the input includes a clamp diode.
7 2Y tri_state 3-state multiplexer output 2; it goes to high-impedance (Z) when OE is HIGH.
8 GND power_in Ground (0 V) reference for all voltages.
9 3Y tri_state 3-state multiplexer output 3; it goes to high-impedance (Z) when OE is HIGH.
10 3I1 input Data input from source 1 for multiplexer 3; input voltage range is 0 V to VCC and the input includes a clamp diode.
11 3I0 input Data input from source 0 for multiplexer 3; input voltage range is 0 V to VCC and the input includes a clamp diode.
12 4Y tri_state 3-state multiplexer output 4; it goes to high-impedance (Z) when OE is HIGH.
13 4I1 input Data input from source 1 for multiplexer 4; input voltage range is 0 V to VCC and the input includes a clamp diode.
14 4I0 input Data input from source 0 for multiplexer 4; input voltage range is 0 V to VCC and the input includes a clamp diode.
15 OE input 3-state output enable input, active LOW; a HIGH level forces all outputs into the high-impedance OFF-state.
16 VCC power_in Supply voltage: recommended 2.0 V to 6.0 V for 74HC257 and 4.5 V to 5.5 V for 74HCT257; absolute maximum is -0.5 V to +7 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage (absolute maximum) VCC -0.5 7 V 4
input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
output current IO -35 35 mA VO = -0.5 V to VCC + 0.5 V 4
supply current ICC 70 mA 4
ground current IGND -70 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW 4
supply voltage (74HC257) VCC 2 5 6 V 5
input voltage VI 0 V 5
output voltage VO 0 V 5
ambient temperature Tamb -40 25 125 °C 5
input transition rise and fall rate Δt/ΔV 625 ns/V VCC = 2.0 V 5
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 5
input transition rise and fall rate Δt/ΔV 83 ns/V VCC = 6.0 V 5
HIGH-level input voltage VIH 1.5 1.2 V VCC = 2.0 V; 25 °C 5
HIGH-level input voltage VIH 3.15 2.4 V VCC = 4.5 V; 25 °C 5
HIGH-level input voltage VIH 4.2 3.2 V VCC = 6.0 V; 25 °C 5
LOW-level input voltage VIL 0.8 0.5 V VCC = 2.0 V; 25 °C 5
LOW-level input voltage VIL 2.1 1.35 V VCC = 4.5 V; 25 °C 5
LOW-level input voltage VIL 2.8 1.8 V VCC = 6.0 V; 25 °C 5
HIGH-level output voltage VOH 1.9 2 V VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; 25 °C 5
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; 25 °C 5
HIGH-level output voltage VOH 5.9 6 V VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; 25 °C 5
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; 25 °C 5
HIGH-level output voltage VOH 5.48 5.81 V VI = VIH or VIL; IO = -7.8 mA; VCC = 6.0 V; 25 °C 5
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; 25 °C 5
LOW-level output voltage VOL 0.15 0.26 V VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; 25 °C 5
LOW-level output voltage VOL 0.16 0.26 V VI = VIH or VIL; IO = 7.8 mA; VCC = 6.0 V; 25 °C 5
input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 6.0 V; 25 °C 5
OFF-state output current IOZ -0.5 0.5 μA VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND; 25 °C 5
supply current ICC 8 μA VI = VCC or GND; IO = 0 A; VCC = 6.0 V; 25 °C 5
propagation delay nI0/nI1 to nY tpd 36 110 ns VCC = 2.0 V; 25 °C; see Fig. 5 7
propagation delay nI0/nI1 to nY tpd 13 22 ns VCC = 4.5 V; 25 °C; see Fig. 5 7
propagation delay nI0/nI1 to nY tpd 10 19 ns VCC = 6.0 V; 25 °C; see Fig. 5 7
propagation delay S to nY tpd 47 150 ns VCC = 2.0 V; 25 °C; see Fig. 5 7
propagation delay S to nY tpd 17 30 ns VCC = 4.5 V; 25 °C; see Fig. 5 7
propagation delay S to nY tpd 14 26 ns VCC = 6.0 V; 25 °C; see Fig. 5 7
enable time OE to nY ten 33 150 ns VCC = 2.0 V; 25 °C; see Fig. 6 7
enable time OE to nY ten 12 30 ns VCC = 4.5 V; 25 °C; see Fig. 6 7
enable time OE to nY ten 10 26 ns VCC = 6.0 V; 25 °C; see Fig. 6 7
disable time OE to nY tdis 41 150 ns VCC = 2.0 V; 25 °C; see Fig. 6 7
disable time OE to nY tdis 15 30 ns VCC = 4.5 V; 25 °C; see Fig. 6 7
disable time OE to nY tdis 12 26 ns VCC = 6.0 V; 25 °C; see Fig. 6 7
transition time tt 14 60 ns VCC = 2.0 V; 25 °C; see Fig. 5 7
transition time tt 5 12 ns VCC = 4.5 V; 25 °C; see Fig. 5 7
transition time tt 4 10 ns VCC = 6.0 V; 25 °C; see Fig. 5 7
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 5.2 V VI = VIH or VIL; IO = -7.8 mA; VCC = 6.0 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
input leakage current II -1 1 μA VI = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C 5
OFF-state output current IOZ -10 10 μA VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND; -40 °C to +125 °C 5
supply current ICC 160 μA VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +125 °C 5

CAD (KiCad official)

  • Symbol: 74HC257PW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc257pw-etched.step / 74hc257pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc257pw.step / 74hc257pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 9a5ab16a50053e88, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF