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README

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74HC251D

Nexperia · Signal Switches, Multiplexers, Decoders · SOIC-16

74HC251D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I3 input Data input I3 of the 8-input multiplexer, selected when S2 is LOW and S1 and S0 are HIGH with OE LOW; the datasheet gives the input range as 0 V to VCC and states the clamp diodes allow current-limited interfacing to voltages above VCC.
2 I2 input Data input I2 of the 8-input multiplexer, selected when S2 is LOW, S1 is HIGH and S0 is LOW with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
3 I1 input Data input I1 of the 8-input multiplexer, selected when S2 is LOW, S1 is LOW and S0 is HIGH with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
4 I0 input Data input I0 of the 8-input multiplexer, selected when S2, S1 and S0 are all LOW with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
5 Y output Multiplexer output that follows the selected data input (non-inverting) and goes to the high-impedance OFF-state when OE is HIGH, per the function table.
6 ~{Y} output Complementary multiplexer output that carries the inverse of the selected data input and goes to the high-impedance OFF-state when OE is HIGH, per the function table.
7 OE input Output enable input; the function table shows a HIGH level forces Y and Y̅ to high-impedance (Z) and the Section 1 text says a HIGH on OE causes the high-impedance OFF-state, although Table 2 labels it active LOW.
8 GND power_in Ground pin at 0 V, the reference for all voltages stated in the datasheet.
9 S2 input Common data select input (most significant select bit) that, together with S1 and S0, chooses which data input I0 to I7 is routed to Y and Y̅.
10 S1 input Common data select input (middle select bit) that, together with S2 and S0, chooses which data input I0 to I7 is routed to Y and Y̅.
11 S0 input Common data select input (least significant select bit) that, together with S2 and S1, chooses which data input I0 to I7 is routed to Y and Y̅.
12 I7 input Data input I7 of the 8-input multiplexer, selected when S2, S1 and S0 are all HIGH with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
13 I6 input Data input I6 of the 8-input multiplexer, selected when S2 is HIGH, S1 is HIGH and S0 is LOW with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
14 I5 input Data input I5 of the 8-input multiplexer, selected when S2 is HIGH, S1 is LOW and S0 is HIGH with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
15 I4 input Data input I4 of the 8-input multiplexer, selected when S2 is HIGH, S1 is LOW and S0 is LOW with OE LOW; the input range is 0 V to VCC and clamp diodes allow current-limited interfacing to voltages above VCC.
16 VCC power_in Supply voltage; the recommended range is 2.0 V to 6.0 V for 74HC251 and 4.5 V to 5.5 V for 74HCT251, with absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC -0.5 7 V 4
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Output current IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 4
Supply current ICC 50 mA 4
Ground current IGND -50 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C; derates 12.4 mW/K above 110 °C (SO16, note [1]) 4
Supply voltage (74HC251) VCC 2 5 6 V 5
Input voltage (74HC251) VI 0 V 5
Output voltage (74HC251) VO 0 V 5
Ambient temperature (74HC251) Tamb -40 25 125 °C 5
Input transition rise and fall rate Δt/ΔV 625 ns/V VCC = 2.0 V 5
Input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 5
Input transition rise and fall rate Δt/ΔV 83 ns/V VCC = 6.0 V 5
HIGH-level input voltage VIH 1.5 1.2 V VCC = 2.0 V; 25 °C 5
HIGH-level input voltage VIH 1.5 V VCC = 2.0 V; -40 °C to +125 °C 5
HIGH-level input voltage VIH 3.15 2.4 V VCC = 4.5 V; 25 °C 5
HIGH-level input voltage VIH 3.15 V VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level input voltage VIH 4.2 3.2 V VCC = 6.0 V; 25 °C 5
HIGH-level input voltage VIH 4.2 V VCC = 6.0 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 0.8 0.5 V VCC = 2.0 V; 25 °C 5
LOW-level input voltage VIL 0.5 V VCC = 2.0 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 2.1 1.35 V VCC = 4.5 V; 25 °C 5
LOW-level input voltage VIL 1.35 V VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level input voltage VIL 2.8 1.8 V VCC = 6.0 V; 25 °C 5
LOW-level input voltage VIL 1.8 V VCC = 6.0 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 1.9 2 V VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; 25 °C 5
HIGH-level output voltage VOH 1.9 V VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; 25 °C 5
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 5.9 6 V VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; 25 °C 5
HIGH-level output voltage VOH 5.9 V VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; 25 °C 5
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 5.48 5.81 V VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; 25 °C 5
HIGH-level output voltage VOH 5.2 V VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; 25 °C 5
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0.15 0.26 V VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; 25 °C 5
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0.16 0.26 V VI = VIH or VIL; IO = 5.2 mA; VCC = 6.0 V; 25 °C 5
Input leakage current II -0.1 0.1 μA VI = VCC or GND; VCC = 6.0 V; 25 °C 6
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C 6
OFF-state output current IOZ -0.5 0.5 μA VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V; 25 °C 6
OFF-state output current IOZ -10 10 μA VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C 6
Supply current ICC 8 μA VI = VCC or GND; IO = 0 A; VCC = 6.0 V; 25 °C 6
Supply current ICC 160 μA VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +125 °C 6
Propagation delay In to Y tpd 50 170 ns In to Y; see Fig. 6; CL = 50 pF; VCC = 2.0 V; 25 °C 7
Propagation delay In to Y tpd 18 34 ns In to Y; see Fig. 6; CL = 50 pF; VCC = 4.5 V; 25 °C 7
Propagation delay In to Y tpd 14 29 ns In to Y; see Fig. 6; CL = 50 pF; VCC = 6.0 V; 25 °C 7
Propagation delay Sn to Y tpd 66 205 ns Sn to Y; see Fig. 7; CL = 50 pF; VCC = 2.0 V; 25 °C 7
Propagation delay Sn to Y tpd 24 41 ns Sn to Y; see Fig. 7; CL = 50 pF; VCC = 4.5 V; 25 °C 7
Propagation delay Sn to Y tpd 19 35 ns Sn to Y; see Fig. 7; CL = 50 pF; VCC = 6.0 V; 25 °C 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin per input pin; Sn input - 150 540 - 675 - 735 μA input 6

CAD (KiCad official)

  • Symbol: 74HC251D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc251d-etched.step / 74hc251d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc251d.step / 74hc251d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 548cffe1beed1ca5, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF