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74HC245TS
Public Made by Adomby adom
GR Buffer/Driver/Transceiver, TSSOP-20. Pinout settled in review by an AI reviewer against the manufacturer's datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC245TS
GR · Buffer/Driver/Transceiver · TSSOP-20
74HC245TS from GR, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction control for the 8-bit bus transceiver: per the truth table, DIR high transfers data from A to B and DIR low transfers data from B to A, with OE# enabling the outputs. |
| 2 | A0 | bidirectional | Parallel data input/output A0 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 3 | A1 | bidirectional | Parallel data input/output A1 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 4 | A2 | bidirectional | Parallel data input/output A2 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 5 | A3 | bidirectional | Parallel data input/output A3 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 6 | A4 | bidirectional | Parallel data input/output A4 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 7 | A5 | bidirectional | Parallel data input/output A5 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 8 | A6 | bidirectional | Parallel data input/output A6 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 9 | A7 | bidirectional | Parallel data input/output A7 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 10 | GND | power_in | Power ground reference for the device. |
| 11 | B7 | bidirectional | Parallel data input/output B7 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 12 | B6 | bidirectional | Parallel data input/output B6 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 13 | B5 | bidirectional | Parallel data input/output B5 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 14 | B4 | bidirectional | Parallel data input/output B4 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 15 | B3 | bidirectional | Parallel data input/output B3 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 16 | B2 | bidirectional | Parallel data input/output B2 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 17 | B1 | bidirectional | Parallel data input/output B1 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 18 | B0 | bidirectional | Parallel data input/output B0 of the 8-bit bidirectional bus; direction is set by DIR and the pin goes high-impedance when OE# is high, with a single-pin output current limit of ±35 mA. |
| 19 | OE# | input | Output enable control, active low: when low the A and B outputs are enabled per DIR, and when high both ports are set to high-impedance (Z). |
| 20 | VCC | power_in | Positive supply pin; the operating supply range is 2 V to 6 V and the absolute maximum is -0.5 V to 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | GR |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 6.5 | V | 2 | ||
| Input/output voltage | VIN, VOUT | -0.5 | V | 2 | |||
| Input/output clamp current | IIK, IOK | -20 | 20 | mA | 2 | ||
| Output current per pin | IOUT | -35 | 35 | mA | 2 | ||
| Current into VCC or GND pin | ICC | -70 | 70 | mA | 2 | ||
| Power dissipation | PD | 500 | mW | 2 | |||
| Operating temperature | TA | 0 | 70 | ℃ | 2 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 2 | ||
| Lead soldering temperature | TW | 260 | ℃ | 10 s | 2 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 3 | |
| Input/output voltage | VIN, VOUT | 0 | V | 3 | |||
| Input rise/fall time | tr, tf | 0 | 1000 | ns | VCC=2.0V | 3 | |
| Input rise/fall time | tr, tf | 0 | 500 | ns | VCC=4.5V | 3 | |
| Input rise/fall time | tr, tf | 0 | 400 | ns | VCC=6.0V | 3 | |
| High-level input voltage | VIH | 1.5 | V | VCC=2.0V | 4 | ||
| High-level input voltage | VIH | 3.15 | V | VCC=4.5V | 4 | ||
| High-level input voltage | VIH | 4.2 | V | VCC=6.0V | 4 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC=2.0V | 4 | ||
| Low-level input voltage | VIL | 1.35 | V | VCC=4.5V | 4 | ||
| Low-level input voltage | VIL | 1.8 | V | VCC=6.0V | 4 | ||
| High-level output voltage | VOH | 1.9 | V | VI=VIH or VIL, IOH=20µA, VCC=2.0V | 4 | ||
| High-level output voltage | VOH | 4.4 | V | VI=VIH or VIL, IOH=20µA, VCC=4.5V | 4 | ||
| High-level output voltage | VOH | 5.9 | V | VI=VIH or VIL, IOH=20µA, VCC=6.0V | 4 | ||
| High-level output voltage | VOH | 3.9 | 4.3 | V | VI=VIH or VIL, IOH=4.0mA, VCC=4.5V | 4 | |
| High-level output voltage | VOH | 5.2 | 5.7 | V | VI=VIH or VIL, IOH=5.2mA, VCC=6.0V | 4 | |
| Low-level output voltage | VOL | 0.1 | V | VI=VIH or VIL, IOH=20µA (as printed), VCC=2.0V | 4 | ||
| Low-level output voltage | VOL | 0.2 | 0.5 | V | VI=VIH or VIL, IOH=4.0mA (as printed), VCC=4.5V | 4 | |
| Low-level output voltage | VOL | 0.3 | 0.5 | V | VI=VIH or VIL, IOH=5.2mA (as printed), VCC=6.0V | 4 | |
| Input leakage current | ILI | 1 | uA | VI=VCC or GND, VCC=6.0V | 4 | ||
| High-impedance output current | IOZ | 0.5 | uA | VI=VIH or VIL, VO=VCC or GND, VCC=6.0V | 4 | ||
| Operating current | ICC | 2 | 10 | uA | VI=VCC or GND, IOUT=0µA, VCC=6.0V | 4 | |
| Operating voltage | VCC | 2 | 6 | V | 4 | ||
| Propagation delay time (An to Bn or Bn to An), high-to-low | tPHL | 24 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Propagation delay time (An to Bn or Bn to An), low-to-high | tPLH | 18 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Output enable time, OE to An or Bn, low-level | tPZL | 25 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Output enable time, OE to An or Bn, high-level | tPZH | 17 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Output disable time, OE to An or Bn, high-level | tPHZ | 22 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Output disable time, OE to An or Bn, low-level | tPLZ | 18 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Output rise time, An or Bn | TTLH | 30 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 | ||
| Output fall time, An or Bn | TTHL | 25 | ns | VCC=5.0V, CL=50pF, tr=tf≤20ns | 4 |
CAD (KiCad official)
- Symbol:
74HC245TS - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74hc245ts-etched.step/74hc245ts-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc245ts.step/74hc245ts.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: GR datasheet (9 pp, sha256
6afae021f7cb64e5, retrieved 2026-11-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).