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74HC245MT

HGSEMI · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

74HC245MT from HGSEMI, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Transfer direction control input that selects the direction of data flow between the A and B buses according to the truth table, with the device enabled when OE is low.
2 A0 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
3 A1 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
4 A2 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
5 A3 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
6 A4 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
7 A5 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
8 A6 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
9 A7 bidirectional Data input/output on the A bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
10 GND power_in Ground reference (0 V) for the device.
11 B7 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
12 B6 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
13 B5 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
14 B4 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
15 B3 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
16 B2 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
17 B1 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
18 B0 bidirectional Data input/output on the B bus, a positive-phase three-state port whose output current is limited to ±35 mA (Io, absolute maximum).
19 OE input Active-low output enable input; when high, the A and B port outputs are placed in high-impedance state, isolating the buses.
20 VCC power_in Supply voltage, recommended 2.0 V to 6.0 V, with an absolute maximum of +7.0 V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5 6 V 4
Input voltage VI 0 V 4
Output voltage Vo 0 V 4
Operating ambient temperature Tamb -40 85 ℃ 4
Input rise and fall time tr, tf 1000 ns Vcc=2.0V 4
Input rise and fall time tr, tf 6 500 ns Vcc=4.5V 4
Input rise and fall time tr, tf 400 ns Vcc=6.0V 4
Supply voltage VCC -0.5 7 V 4
Input clamp current Ilk -20 20 mA VI<-0.5V or VI>Vcc+0.5V 4
Output clamp current Iok -20 20 mA Vo<-0.5V or Vo>Vcc+0.5V 4
Output current (source or sink) Io -35 35 mA -0.5V<Vo<Vcc+0.5V 4
VCC or GND current ICC, IGND -70 70 mA 4
Storage temperature Tstg -65 150 ℃ 4
Soldering temperature TL 260 ℃ 10 s 4
High-level input voltage VIH 1.5 1.2 V VCC=2.0V 5
High-level input voltage VIH 3.15 2.4 V VCC=4.5V 5
High-level input voltage VIH 4.2 3.2 V VCC=6.0V 5
Low-level input voltage VIL 0.8 0.5 V VCC=2.0V 5
Low-level input voltage VIL 2.1 1.35 V VCC=4.5V 5
Low-level input voltage VIL 2.8 1.8 V VCC=6.0V 5
High-level output voltage VOH 1.9 2 V VI=VIH or VIL, VCC=2.0V, IO=-20uA 5
High-level output voltage VOH 4.4 4.5 V VI=VIH or VIL, VCC=4.5V, IO=-20uA 5
High-level output voltage VOH 5.9 6 V VI=VIH or VIL, VCC=6.0V, IO=-20uA 5
High-level output voltage VOH 3.98 4.32 V VI=VIH or VIL, VCC=4.5V, IO=-6.0mA 5
High-level output voltage VOH 5.7 6 V VI=VIH or VIL, VCC=6.0V, IO=-4mA 5
Low-level output voltage VOL 0 0.1 V VI=VIH or VIL, VCC=2.0V, IO=20uA 5
Low-level output voltage VOL 0.15 0.3 V VI=VIH or VIL, VCC=4.5V, IO=6.0mA 5
Low-level output voltage VOL 0.16 0.3 V VI=VIH or VIL, VCC=6.0V, IO=4mA 5
Input leakage current ILI -1 0.1 1 uA VI=VCC or GND, VCC=6.0V 5
Off-state output current IOZ -5 5 uA VI=VIH or VIL, Vo=VCC or GND, VCC=6.0V 5
Quiescent supply current ICC -1 10 uA VI=VCC or GND, VCC=6.0V, IO=0 5
Propagation delay An to Bn or Bn to An tPHL/tPLH 25 900 ns VCC=2.0V; see Fig.4 7
Propagation delay An to Bn or Bn to An tPHL/tPLH 9 18 ns VCC=4.5V; see Fig.4 7
Propagation delay An to Bn or Bn to An tPHL/tPLH 7 15 ns VCC=6.0V; see Fig.4 7
Output transition time tTHL/tTLH 14 60 ns VCC=2.0V 7
Output transition time tTHL/tTLH 5 12 ns VCC=4.5V 7
Output transition time tTHL/tTLH 4 10 ns VCC=6.0V 7
3-state output enable time to An/Bn outputs tPZH/tPZl 30 150 ns VCC=2.0V; see Fig.5 7
3-state output enable time to An/Bn outputs tPZH/tPZl 11 30 ns VCC=4.5V; see Fig.5 7
3-state output enable time to An/Bn outputs tPZH/tPZl 9 26 ns VCC=6.0V; see Fig.5 7
3-state output disable time to An/Bn outputs tPHZ/tPLZ 41 150 ns VCC=2.0V 7
3-state output disable time to An/Bn outputs tPHZ/tPLZ 15 30 ns VCC=4.5V 7
3-state output disable time to An/Bn outputs tPHZ/tPLZ 12 26 ns VCC=6.0V 7
High-level input voltage (Tamb -40~85℃) VIH 1.5 V VCC=2.0V 6
High-level input voltage (Tamb -40~85℃) VIH 3.15 V VCC=4.5V 6
High-level input voltage (Tamb -40~85℃) VIH 4.2 V VCC=6.0V 6
Low-level input voltage (Tamb -40~85℃) VIL 0.5 V VCC=2.0V 6
Low-level input voltage (Tamb -40~85℃) VIL 1.35 V VCC=4.5V 6
Low-level input voltage (Tamb -40~85℃) VIL 1.8 V VCC=6.0V 6
High-level output voltage (Tamb -40~85℃) VOH 1.9 V VI=VIH or VIL, VCC=2.0V, IO=-20uA 6
High-level output voltage (Tamb -40~85℃) VOH 4.4 V VI=VIH or VIL, VCC=4.5V, IO=-20uA 6
High-level output voltage (Tamb -40~85℃) VOH 5.9 V VI=VIH or VIL, VCC=6.0V, IO=-20uA 6
High-level output voltage (Tamb -40~85℃) VOH 3.84 V VI=VIH or VIL, VCC=4.5V, IO=-6.0mA 6
High-level output voltage (Tamb -40~85℃) VOH 5.34 V VI=VIH or VIL, VCC=6.0V, IO=-4mA 6
Low-level output voltage (Tamb -40~85℃) VOL 0.1 V VI=VIH or VIL, VCC=2.0V, IO=20uA 6
Low-level output voltage (Tamb -40~85℃) VOL 0.33 V VI=VIH or VIL, VCC=4.5V, IO=6.0mA 6

CAD (KiCad official)

  • Symbol: 74HC245MT
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74hc245mt-etched.step / 74hc245mt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc245mt.step / 74hc245mt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (14 pp, sha256 cb1176016eea4118, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF