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74HC244PWRG

HANSCHIP semiconductor · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

74HC244PWRG from HANSCHIP semiconductor, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input (active LOW); a HIGH level on 1OE forces outputs 1Y0 to 1Y3 into the high-impedance OFF-state.
2 1A0 input Data input for buffer channel 1A0; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
3 2Y0 tri_state Non-inverting 3-state bus output of buffer channel 2Y0, high-impedance when 2OE is HIGH.
4 1A1 input Data input for buffer channel 1A1; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
5 2Y1 tri_state Non-inverting 3-state bus output of buffer channel 2Y1, high-impedance when 2OE is HIGH.
6 1A2 input Data input for buffer channel 1A2; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
7 2Y2 tri_state Non-inverting 3-state bus output of buffer channel 2Y2, high-impedance when 2OE is HIGH.
8 1A3 input Data input for buffer channel 1A3; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
9 2Y3 tri_state Non-inverting 3-state bus output of buffer channel 2Y3, high-impedance when 2OE is HIGH.
10 GND power_in Ground reference (0 V) for the device.
11 2A3 input Data input for buffer channel 2A3; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
12 1Y3 tri_state Non-inverting 3-state bus output of buffer channel 1Y3, high-impedance when 1OE is HIGH.
13 2A2 input Data input for buffer channel 2A2; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
14 1Y2 tri_state Non-inverting 3-state bus output of buffer channel 1Y2, high-impedance when 1OE is HIGH.
15 2A1 input Data input for buffer channel 2A1; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
16 1Y1 tri_state Non-inverting 3-state bus output of buffer channel 1Y1, high-impedance when 1OE is HIGH.
17 2A0 input Data input for buffer channel 2A0; inputs have clamp diodes that allow current-limiting resistors for interfacing to voltages above VCC.
18 1Y0 tri_state Non-inverting 3-state bus output of buffer channel 1Y0, high-impedance when 1OE is HIGH.
19 2OE input Output enable input (active LOW); a HIGH level on 2OE forces outputs 2Y0 to 2Y3 into the high-impedance OFF-state.
20 VCC power_in Supply voltage; the 74HC244 is specified for 2.0 V to 6.0 V and the 74HCT244 for 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 4
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 4
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 4
output current IO -35 35 mA -0.5V < VO < VCC+0.5V 4
supply current ICC 70 mA 4
ground current IGND -70 mA 4
storage temperature Tstg -65 150 ℃ 4
total power dissipation Ptot 500 mW 4
supply voltage (74HC244) VCC 2 5 6 V 4
input voltage VI 0 V 4
output voltage VO 0 V 4
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 4
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 4
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 4
ambient temperature Tamb -40 85 ℃ 4
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +85℃; VCC=2.0V 6
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +85℃; VCC=4.5V 6
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +85℃; VCC=6.0V 6
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +85℃; VCC=2.0V 6
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +85℃; VCC=4.5V 6
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +85℃; VCC=6.0V 6
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 6
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 6
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 6
HIGH-level output voltage VOH 3.84 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-6.0mA; VCC=4.5V 6
HIGH-level output voltage VOH 5.34 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-7.8mA; VCC=6.0V 6
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 6
LOW-level output voltage VOL 0.33 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=6.0mA; VCC=4.5V 6
input leakage current II -1 1 uA Tamb=-40℃ to +85℃; VI=VCC or GND; VCC=6.0V 6
OFF-state output current IOZ -5 5 uA Tamb=-40℃ to +85℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 6
supply current ICC 80 uA Tamb=-40℃ to +85℃; VI=VCC or GND; IO=0A; VCC=6.0V 6
nAn to nYn propagation delay tpd 145 ns Tamb=-40℃ to +85℃; VCC=2.0V; see Figure 5 8
nAn to nYn propagation delay tpd 28 ns Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 5 8
nAn to nYn propagation delay tpd 24 ns Tamb=-40℃ to +85℃; VCC=6.0V; see Figure 5 8
nOE to nYn enable time ten 190 ns Tamb=-40℃ to +85℃; VCC=2.0V; see Figure 6 8
nOE to nYn enable time ten 38 ns Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 6 8
nOE to nYn enable time ten 33 ns Tamb=-40℃ to +85℃; VCC=6.0V; see Figure 6 8
nOE to nYn disable time tdis 190 ns Tamb=-40℃ to +85℃; VCC=2.0V; see Figure 6 8
nOE to nYn disable time tdis 38 ns Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 6 8
nOE to nYn disable time tdis 33 ns Tamb=-40℃ to +85℃; VCC=6.0V; see Figure 6 8
transition time tt 75 ns Tamb=-40℃ to +85℃; VCC=2.0V; see Figure 5 8
transition time tt 15 ns Tamb=-40℃ to +85℃; VCC=4.5V; see Figure 5 8
transition time tt 13 ns Tamb=-40℃ to +85℃; VCC=6.0V; see Figure 5 8
HIGH-level output voltage VOH 1.9 2 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 5
HIGH-level output voltage VOH 4.4 4.5 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 5
HIGH-level output voltage VOH 5.9 6 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 5
HIGH-level output voltage VOH 3.98 4.32 V Tamb=25℃; VI=VIH or VIL; IO=-6.0mA; VCC=4.5V 5
HIGH-level output voltage VOH 5.48 5.81 V Tamb=25℃; VI=VIH or VIL; IO=-7.8mA; VCC=6.0V 5
LOW-level output voltage VOL 0 0.1 V Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 5
LOW-level output voltage VOL 0.15 0.26 V Tamb=25℃; VI=VIH or VIL; IO=6.0mA; VCC=4.5V 5
LOW-level output voltage VOL 0.16 0.26 V Tamb=25℃; VI=VIH or VIL; IO=7.8mA; VCC=6.0V 5
input leakage current II -0.1 0.1 uA Tamb=25℃; VI=VCC or GND; VCC=6.0V 5
OFF-state output current IOZ -0.5 0.5 uA Tamb=25℃; VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 5
supply current ICC 8 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 5
input capacitance CI 3.5 pF 5

CAD (KiCad official)

  • Symbol: 74HC244PWRG
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74hc244pwrg-etched.step / 74hc244pwrg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc244pwrg.step / 74hc244pwrg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (14 pp, sha256 89ae331fa36a036e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF