component
74HC240BQ
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, DHVQFN-20-EP(2.5x4.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74HC240BQ
Nexperia · Buffers, Drivers, Receivers, Transceivers · DHVQFN-20-EP(2.5x4.5)
74HC240BQ from Nexperia, in a DHVQFN-20-EP(2.5x4.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for outputs 1Y0 to 1Y3, active LOW; a HIGH level places these outputs in the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input for the 1Y0 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 3 | 2Y0 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 4 | 1A1 | input | Data input for the 1Y1 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 5 | 2Y1 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 6 | 1A2 | input | Data input for the 1Y2 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 7 | 2Y2 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 8 | 1A3 | input | Data input for the 1Y3 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 9 | 2Y3 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 10 | GND | power_in | Ground reference (0 V); all voltages in the datasheet are referenced to this pin. |
| 11 | 2A3 | input | Data input for the 2Y3 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 12 | 1Y3 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 13 | 2A2 | input | Data input for the 2Y2 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 14 | 1Y2 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 15 | 2A1 | input | Data input for the 2Y1 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 16 | 1Y1 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 17 | 2A0 | input | Data input for the 2Y0 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 18 | 1Y0 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 19 | 2OE | input | Output enable input for outputs 2Y0 to 2Y3, active LOW; a HIGH level places these outputs in the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage: 2.0 V to 6.0 V recommended for 74HC240 (4.5 V to 5.5 V for 74HCT240), with an absolute maximum of +7 V. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | DHVQFN-20-EP(2.5x4.5) |
| Category | Logic |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| output current | IO | -35 | 35 | mA | -0.5 V < VO < VCC + 0.5 V | 4 | |
| supply current | ICC | 70 | mA | 4 | |||
| ground current | IGND | -70 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 500 | mW | Note [1]: for SOT764-1 (DHVQFN20) derates linearly with 12.9 mW/K above 111 °C | 4 | ||
| supply voltage | VCC | 2 | 5 | 6 | V | 74HC240 column | 4 |
| input voltage | VI | 0 | V | 4 | |||
| output voltage | VO | 0 | V | 4 | |||
| input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC = 2.0 V | 4 | ||
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC = 4.5 V | 4 | |
| input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC = 6.0 V | 4 | ||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | VCC = 2.0 V; min at -40 °C to +125 °C; typ at 25 °C | 4 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | VCC = 4.5 V; min at -40 °C to +125 °C; typ at 25 °C | 4 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | VCC = 6.0 V; min at -40 °C to +125 °C; typ at 25 °C | 4 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | VCC = 2.0 V; max at -40 °C to +125 °C; typ at 25 °C | 4 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | VCC = 4.5 V; max at -40 °C to +125 °C; typ at 25 °C | 4 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | VCC = 6.0 V; max at -40 °C to +125 °C; typ at 25 °C | 4 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; min at -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; min at -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; min at -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | V | VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; min at -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 5.2 | 5.81 | V | VI = VIH or VIL; IO = -7.8 mA; VCC = 6.0 V; min at -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; max at -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.15 | 0.4 | V | VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; max at -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.16 | 0.4 | V | VI = VIH or VIL; IO = 7.8 mA; VCC = 6.0 V; max at -40 °C to +125 °C | 5 | |
| input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 6.0 V; ±1.0 at -40 °C to +125 °C | 5 | |
| OFF-state output current | IOZ | -10 | 10 | μA | VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND; ±10 at -40 °C to +125 °C | 5 | |
| supply current | ICC | 8 | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; max at -40 °C to +125 °C | 5 | |
| propagation delay nAn to nYn | tpd | 30 | 150 | ns | see Fig. 6; VCC = 2.0 V; max at -40 °C to +125 °C | 6 | |
| propagation delay nAn to nYn | tpd | 11 | 30 | ns | see Fig. 6; VCC = 4.5 V; max at -40 °C to +125 °C | 6 | |
| propagation delay nAn to nYn | tpd | 9 | 26 | ns | see Fig. 6; VCC = 6.0 V; max at -40 °C to +125 °C | 6 | |
| enable time nOE to nYn | ten | 39 | 225 | ns | see Fig. 7; VCC = 2.0 V; max at -40 °C to +125 °C | 6 | |
| enable time nOE to nYn | ten | 14 | 45 | ns | see Fig. 7; VCC = 4.5 V; max at -40 °C to +125 °C | 6 | |
| enable time nOE to nYn | ten | 11 | 38 | ns | see Fig. 7; VCC = 6.0 V; max at -40 °C to +125 °C | 6 | |
| disable time nOE to nYn | tdis | 41 | 225 | ns | see Fig. 7; VCC = 2.0 V; max at -40 °C to +125 °C | 6 | |
| disable time nOE to nYn | tdis | 15 | 45 | ns | see Fig. 7; VCC = 4.5 V; max at -40 °C to +125 °C | 6 | |
| disable time nOE to nYn | tdis | 12 | 38 | ns | see Fig. 7; VCC = 6.0 V; max at -40 °C to +125 °C | 6 | |
| transition time | tt | 14 | 90 | ns | see Fig. 6; VCC = 2.0 V; max at -40 °C to +125 °C | 6 | |
| transition time | tt | 5 | 18 | ns | see Fig. 6; VCC = 4.5 V; max at -40 °C to +125 °C | 6 | |
| transition time | tt | 4 | 15 | ns | see Fig. 6; VCC = 6.0 V; max at -40 °C to +125 °C | 6 |
CAD (KiCad official)
- Symbol:
74HC240BQ - Footprint:
Package_DFN_QFN:DHVQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x3mm - 3D model: DHVQFN-20-EP(2.5x4.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
74hc240bq-etched.step/74hc240bq-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc240bq.step/74hc240bq.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
b12765e779eecbec, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC240BQ
**Nexperia** · Buffers, Drivers, Receivers, Transceivers · DHVQFN-20-EP(2.5x4.5)
74HC240BQ from Nexperia, in a DHVQFN-20-EP(2.5x4.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for outputs 1Y0 to 1Y3, active LOW; a HIGH level places these outputs in the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input for the 1Y0 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 3 | 2Y0 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 4 | 1A1 | input | Data input for the 1Y1 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 5 | 2Y1 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 6 | 1A2 | input | Data input for the 1Y2 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 7 | 2Y2 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 8 | 1A3 | input | Data input for the 1Y3 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 9 | 2Y3 | tri_state | Inverting 3-state bus output controlled by 2OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 10 | GND | power_in | Ground reference (0 V); all voltages in the datasheet are referenced to this pin. |
| 11 | 2A3 | input | Data input for the 2Y3 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 12 | 1Y3 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 13 | 2A2 | input | Data input for the 2Y2 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 14 | 1Y2 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 15 | 2A1 | input | Data input for the 2Y1 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 16 | 1Y1 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 17 | 2A0 | input | Data input for the 2Y0 inverting buffer; the input has a clamp diode, with input clamping current limited to ±20 mA when VI < -0.5 V or VI > VCC + 0.5 V. |
| 18 | 1Y0 | tri_state | Inverting 3-state bus output controlled by 1OE; output current is rated at ±35 mA within -0.5 V < VO < VCC + 0.5 V. |
| 19 | 2OE | input | Output enable input for outputs 2Y0 to 2Y3, active LOW; a HIGH level places these outputs in the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage: 2.0 V to 6.0 V recommended for 74HC240 (4.5 V to 5.5 V for 74HCT240), with an absolute maximum of +7 V. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | DHVQFN-20-EP(2.5x4.5) |
| Category | Logic |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| input clamping current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 |
| output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 |
| output current | IO | -35 | | 35 | mA | -0.5 V < VO < VCC + 0.5 V | 4 |
| supply current | ICC | | | 70 | mA | | 4 |
| ground current | IGND | -70 | | | mA | | 4 |
| storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| total power dissipation | Ptot | | | 500 | mW | Note [1]: for SOT764-1 (DHVQFN20) derates linearly with 12.9 mW/K above 111 °C | 4 |
| supply voltage | VCC | 2 | 5 | 6 | V | 74HC240 column | 4 |
| input voltage | VI | 0 | | | V | | 4 |
| output voltage | VO | 0 | | | V | | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 625 | ns/V | VCC = 2.0 V | 4 |
| input transition rise and fall rate | Δt/ΔV | | 1.67 | 139 | ns/V | VCC = 4.5 V | 4 |
| input transition rise and fall rate | Δt/ΔV | | | 83 | ns/V | VCC = 6.0 V | 4 |
| ambient temperature | Tamb | -40 | 25 | 125 | °C | | 4 |
| HIGH-level input voltage | VIH | 1.5 | 1.2 | | V | VCC = 2.0 V; min at -40 °C to +125 °C; typ at 25 °C | 4 |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | | V | VCC = 4.5 V; min at -40 °C to +125 °C; typ at 25 °C | 4 |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | | V | VCC = 6.0 V; min at -40 °C to +125 °C; typ at 25 °C | 4 |
| LOW-level input voltage | VIL | | 0.8 | 0.5 | V | VCC = 2.0 V; max at -40 °C to +125 °C; typ at 25 °C | 4 |
| LOW-level input voltage | VIL | | 2.1 | 1.35 | V | VCC = 4.5 V; max at -40 °C to +125 °C; typ at 25 °C | 4 |
| LOW-level input voltage | VIL | | 2.8 | 1.8 | V | VCC = 6.0 V; max at -40 °C to +125 °C; typ at 25 °C | 4 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; min at -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; min at -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 5.9 | 6 | | V | VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; min at -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | | V | VI = VIH or VIL; IO = -6.0 mA; VCC = 4.5 V; min at -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 5.2 | 5.81 | | V | VI = VIH or VIL; IO = -7.8 mA; VCC = 6.0 V; min at -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; max at -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0.15 | 0.4 | V | VI = VIH or VIL; IO = 6.0 mA; VCC = 4.5 V; max at -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0.16 | 0.4 | V | VI = VIH or VIL; IO = 7.8 mA; VCC = 6.0 V; max at -40 °C to +125 °C | 5 |
| input leakage current | II | -1 | | 1 | μA | VI = VCC or GND; VCC = 6.0 V; ±1.0 at -40 °C to +125 °C | 5 |
| OFF-state output current | IOZ | -10 | | 10 | μA | VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND; ±10 at -40 °C to +125 °C | 5 |
| supply current | ICC | | 8 | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; max at -40 °C to +125 °C | 5 |
| propagation delay nAn to nYn | tpd | | 30 | 150 | ns | see Fig. 6; VCC = 2.0 V; max at -40 °C to +125 °C | 6 |
| propagation delay nAn to nYn | tpd | | 11 | 30 | ns | see Fig. 6; VCC = 4.5 V; max at -40 °C to +125 °C | 6 |
| propagation delay nAn to nYn | tpd | | 9 | 26 | ns | see Fig. 6; VCC = 6.0 V; max at -40 °C to +125 °C | 6 |
| enable time nOE to nYn | ten | | 39 | 225 | ns | see Fig. 7; VCC = 2.0 V; max at -40 °C to +125 °C | 6 |
| enable time nOE to nYn | ten | | 14 | 45 | ns | see Fig. 7; VCC = 4.5 V; max at -40 °C to +125 °C | 6 |
| enable time nOE to nYn | ten | | 11 | 38 | ns | see Fig. 7; VCC = 6.0 V; max at -40 °C to +125 °C | 6 |
| disable time nOE to nYn | tdis | | 41 | 225 | ns | see Fig. 7; VCC = 2.0 V; max at -40 °C to +125 °C | 6 |
| disable time nOE to nYn | tdis | | 15 | 45 | ns | see Fig. 7; VCC = 4.5 V; max at -40 °C to +125 °C | 6 |
| disable time nOE to nYn | tdis | | 12 | 38 | ns | see Fig. 7; VCC = 6.0 V; max at -40 °C to +125 °C | 6 |
| transition time | tt | | 14 | 90 | ns | see Fig. 6; VCC = 2.0 V; max at -40 °C to +125 °C | 6 |
| transition time | tt | | 5 | 18 | ns | see Fig. 6; VCC = 4.5 V; max at -40 °C to +125 °C | 6 |
| transition time | tt | | 4 | 15 | ns | see Fig. 6; VCC = 6.0 V; max at -40 °C to +125 °C | 6 |
## CAD (KiCad official)
- Symbol: `74HC240BQ`
- Footprint: `Package_DFN_QFN:DHVQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x3mm`
- 3D model: DHVQFN-20-EP(2.5x4.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `74hc240bq-etched.step` / `74hc240bq-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc240bq.step` / `74hc240bq.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588915019438837760) (14 pp, sha256 `b12765e779eecbec`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc240bq-datasheet.pdf)