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Ray 74hc1g32gw: laser-etched CAD + chip hero (factory 2.0.0 backfill) 43b0203 1mo ago

74HC1G32GW

Nexperia · Gates · SOT-353

74HC1G32GW from Nexperia, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 B input Data input B of the 2-input OR gate. CMOS-level logic input (VIH ~3.15 V at VCC = 4.5 V). Input clamp diodes allow current-limited interfacing to voltages beyond VCC.
2 A input Data input A of the 2-input OR gate. CMOS-level logic input (VIH ~3.15 V at VCC = 4.5 V). Input clamp diodes allow current-limited interfacing to voltages beyond VCC.
3 GND power_in Ground reference (0 V). Return path for supply current; maximum sink current 25 mA (IGND).
4 Y output Data output Y = A OR B. Symmetrical push-pull CMOS output; typical drive ±5.2 V at ±2.6 mA with VCC = 6.0 V; rated output current ±12.5 mA.
5 VCC power_in Supply voltage input. Operating range 2.0 V to 6.0 V (74HC1G32); absolute max 7.0 V. Typical ICC 10 μA at VCC = 6.0 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-353
Category Logic
Pins 5

Ordering variants

  • 74HC1G32GW
  • 74HC1G32GWGV

CAD (KiCad official)

  • Symbol: 74HC1G32GW
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: 74hc1g32gw-etched.step / 74hc1g32gw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc1g32gw.step / 74hc1g32gw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 f27ee4b9be9efe05, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF