74HC165PW

{
 "schema": "adom.pads/1",
 "slug": "74hc165pw",
 "footprint": "TSSOP-16_4.4x5mm_P0.65mm",
 "generated_from": {
  "footprint": "TSSOP-16_4.4x5mm_P0.65mm@sha256:fbac79fc5f310754",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -2.8625,
   -2.275
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "TSSOP-16_4.4x5mm_P0.65mm@sha256:fbac79fc5f310754"
 },
 "pad_count": 16,
 "symbol_pins": [
  "1",
  "10",
  "11",
  "12",
  "13",
  "14",
  "15",
  "16",
  "2",
  "3",
  "4",
  "5",
  "6",
  "7",
  "8",
  "9"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "PL",
   "type": "input",
   "description": "Asynchronous parallel load input (active LOW). When PL is LOW, data from D0-D7 is loaded into the shift register asynchronously; when HIGH, data enters serially at DS on rising CP edges.",
   "is_pin1": true,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "CP",
   "type": "input",
   "description": "Clock input, LOW-to-HIGH edge-triggered. Serial data is shifted on rising edges when CE is LOW and PL is HIGH. Max fmax typically 51 MHz at VCC=4.5 V.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "D4",
   "type": "input",
   "description": "Parallel data input bit 4. Loaded into internal shift register stage Q4 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    -0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "D5",
   "type": "input",
   "description": "Parallel data input bit 5. Loaded into internal shift register stage Q5 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "D6",
   "type": "input",
   "description": "Parallel data input bit 6. Loaded into internal shift register stage Q6 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "D7",
   "type": "input",
   "description": "Parallel data input bit 7 (last stage). Loaded into internal shift register stage Q7 when PL is asserted LOW and appears at Q7 output.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "7",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "7",
   "name": "Q7",
   "type": "output",
   "description": "Complementary (inverted) serial output from the last shift-register stage. Provides logical complement of Q7.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "8",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -2.8625,
    2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "8",
   "name": "GND",
   "type": "power_in",
   "description": "Ground reference (0 V).",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "9",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "9",
   "name": "Q7",
   "type": "output",
   "description": "Serial output from the last stage of the shift register. Cascade this pin to DS of a downstream 74HC165 for wider registers.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "10",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "10",
   "name": "DS",
   "type": "input",
   "description": "Serial data input. Sampled on the LOW-to-HIGH CP edge when CE is LOW and PL is HIGH; drives the first register stage.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "11",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "11",
   "name": "D0",
   "type": "input",
   "description": "Parallel data input bit 0. Loaded into internal shift register stage Q0 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "12",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "12",
   "name": "D1",
   "type": "input",
   "description": "Parallel data input bit 1. Loaded into internal shift register stage Q1 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "13",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -0.325
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "13",
   "name": "D2",
   "type": "input",
   "description": "Parallel data input bit 2. Loaded into internal shift register stage Q2 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "14",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -0.975
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "14",
   "name": "D3",
   "type": "input",
   "description": "Parallel data input bit 3. Loaded into internal shift register stage Q3 when PL is asserted LOW.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "15",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -1.625
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "15",
   "name": "CE",
   "type": "input",
   "description": "Clock enable input (active LOW). When CE is LOW, data is shifted on CP rising edges; when HIGH, CP is disabled and the register holds its state.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "16",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    2.8625,
    -2.275
   ],
   "rot": 0.0,
   "size": [
    1.475,
    0.4
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "16",
   "name": "VCC",
   "type": "power_in",
   "description": "Positive supply voltage. 2.0 V to 6.0 V for 74HC165; 4.5 V to 5.5 V for 74HCT165.",
   "is_pin1": false,
   "source": {
    "geometry": "TSSOP-16_4.4x5mm_P0.65mm.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}