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74HC165-HXY

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HXY MOSFET Shift Registers, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC165-HXY

HXY MOSFET · Shift Registers · SOP-16

74HC165-HXY from HXY MOSFET, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PL input Asynchronous parallel load input, active LOW: when LOW, data on D0 to D7 is loaded into the shift register asynchronously.
2 CP input Clock input, edge-triggered on the LOW-to-HIGH transition; data is shifted on these transitions when CE is LOW, and a HIGH on CE disables CP.
3 D4 input Parallel data input D4, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
4 D5 input Parallel data input D5, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
5 D6 input Parallel data input D6, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
6 D7 input Parallel data input D7, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
7 Q7 output Complementary (inverted) output of the last register stage; pin 7 is the complement output, pin 9 is the true output.
8 GND power_in Ground reference, 0 V.
9 Q7 output Serial (true) output of the last register stage.
10 DS input Serial data input, shifted into the register on the CP LOW-to-HIGH transition when PL is HIGH and CE is LOW; inputs are overvoltage tolerant to 15 V.
11 D0 input Parallel data input D0, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
12 D1 input Parallel data input D1, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
13 D2 input Parallel data input D2, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
14 D3 input Parallel data input D3, loaded into the register when PL is LOW; inputs are overvoltage tolerant to 15 V.
15 CE input Clock enable input, active LOW: data is shifted only when CE is LOW, and a HIGH disables the CP input.
16 VCC power_in Supply voltage: 2.0 V to 6.0 V for 74HC165 and 4.5 V to 5.5 V for 74HCT165 per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer HXY MOSFET
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
HIGH-level input voltage VIH 1.2 V Tamb=25℃; VCC=2.0V 6
HIGH-level input voltage VIH 2.4 V Tamb=25℃; VCC=4.5V 6
HIGH-level input voltage VIH 3.2 V Tamb=25℃; VCC=6.0V 6
LOW-level input voltage VIL 0.8 V Tamb=25℃; VCC=2.0V 6
LOW-level input voltage VIL 2.1 V Tamb=25℃; VCC=4.5V 6
LOW-level input voltage VIL 2.8 V Tamb=25℃; VCC=6.0V 6
HIGH-level output voltage VOH 1.9 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 6
HIGH-level output voltage VOH 4.4 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 6
HIGH-level output voltage VOH 5.9 V Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 6
HIGH-level output voltage VOH 4.32 V Tamb=25℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V 6
HIGH-level output voltage VOH 5.81 V Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 6
LOW-level output voltage VOL 0.1 V Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 6
LOW-level output voltage VOL 0.26 V Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V 6
input leakage current II -0.1 0.1 uA Tamb=25℃; VI=VCC or GND 6
supply current ICC 8 uA Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V 6
input capacitance CI 3.5 pF 6
HIGH-level input voltage VIH 1.5 V Tamb=-40℃ to +85℃; VCC=2.0V 7
HIGH-level input voltage VIH 3.15 V Tamb=-40℃ to +85℃; VCC=4.5V 7
HIGH-level input voltage VIH 4.2 V Tamb=-40℃ to +85℃; VCC=6.0V 7
LOW-level input voltage VIL 0.5 V Tamb=-40℃ to +85℃; VCC=2.0V 7
LOW-level input voltage VIL 1.35 V Tamb=-40℃ to +85℃; VCC=4.5V 7
LOW-level input voltage VIL 1.8 V Tamb=-40℃ to +85℃; VCC=6.0V 7
HIGH-level output voltage VOH 1.9 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V 7
HIGH-level output voltage VOH 4.4 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V 7
HIGH-level output voltage VOH 5.9 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V 7
HIGH-level output voltage VOH 3.84 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V 7
HIGH-level output voltage VOH 5.34 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V 7
LOW-level output voltage VOL 0.1 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=20uA; VCC=2.0V 7
LOW-level output voltage VOL 0.33 V Tamb=-40℃ to +85℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V 7
input leakage current II -1 1 uA Tamb=-40℃ to +85℃; VI=VCC or GND 7
supply current ICC 80 uA Tamb=-40℃ to +85℃; VI=VCC or GND; IO=0A; VCC=6.0V 7
propagation delay CP, CE to Q7, Q7 tpd 205 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=2.0V 10
propagation delay CP, CE to Q7, Q7 tpd 41 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=4.5V 10
propagation delay CP, CE to Q7, Q7 tpd 35 ns Tamb=-40℃ to +85℃; see Figure 6; VCC=6.0V 10
propagation delay PL to Q7, Q7 tpd 205 ns Tamb=-40℃ to +85℃; see Figure 7; VCC=2.0V 10
propagation delay PL to Q7, Q7 tpd 41 ns Tamb=-40℃ to +85℃; see Figure 7; VCC=4.5V 10
propagation delay PL to Q7, Q7 tpd 35 ns Tamb=-40℃ to +85℃; see Figure 7; VCC=6.0V 10
propagation delay CP, CE to Q7, Q7 tpd 165 ns Tamb=25℃; see Figure 6; VCC=2.0V 8
propagation delay CP, CE to Q7, Q7 tpd 33 ns Tamb=25℃; see Figure 6; VCC=4.5V 8
propagation delay CP, CE to Q7, Q7 tpd 28 ns Tamb=25℃; see Figure 6; VCC=6.0V 8
supply voltage VCC 2 5 6 V 5
ambient temperature Tamb -40 85 ℃ 5
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 5
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 5
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 5
supply voltage VCC -0.5 7 V 5
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 5
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 5
output current IO -25 25 mA -0.5V < VO < VCC+0.5V 5
supply current ICC 50 mA 5
ground current IGND -50 mA 5
total power dissipation Ptot 500 mW SOP16: above 70℃ derates linearly with 8mW/K 5
storage temperature Tstg -65 150 ℃ 5
soldering temperature TL 250 ℃ 10s; SOP package 5

CAD (KiCad official)

  • Symbol: 74HC165-HXY
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc165-hxy-etched.step / 74hc165-hxy-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc165-hxy.step / 74hc165-hxy.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HXY MOSFET datasheet (19 pp, sha256 41ced16222e9c961, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF