component
74HC153D
Public Made by Adomby adom
Nexperia Signal Switches, Multiplexers, Decoders, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
74HC153D
Nexperia · Signal Switches, Multiplexers, Decoders · SOIC-16
74HC153D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1E | input | Output enable input for multiplexer 1, active LOW; a HIGH on this input forces output 1Y LOW. |
| 2 | S1 | input | Common data select input (with S0) that chooses which of the four data inputs of each multiplexer is routed to its output. |
| 3 | 1I3 | input | Data input 3 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 4 | 1I2 | input | Data input 2 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 5 | 1I1 | input | Data input 1 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 6 | 1I0 | input | Data input 0 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 7 | 1Y | output | Non-inverting output of multiplexer 1, following the selected data input and forced LOW when 1E is HIGH. |
| 8 | GND | power_in | Ground reference (0 V) for all voltages referenced in the datasheet. |
| 9 | 2Y | output | Non-inverting output of multiplexer 2, following the selected data input and forced LOW when 2E is HIGH. |
| 10 | 2I0 | input | Data input 0 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 11 | 2I1 | input | Data input 1 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 12 | 2I2 | input | Data input 2 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 13 | 2I3 | input | Data input 3 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 14 | S0 | input | Common data select input (with S1) that chooses which of the four data inputs of each multiplexer is routed to its output. |
| 15 | 2E | input | Output enable input for multiplexer 2, active LOW; a HIGH on this input forces output 2Y LOW. |
| 16 | VCC | power_in | Supply voltage: recommended 2.0 V to 6.0 V for 74HC153 and 4.5 V to 5.5 V for 74HCT153 (absolute maximum -0.5 V to +7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | VCC = 2.0 V; -40 °C to +125 °C | 5 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | VCC = 6.0 V; -40 °C to +125 °C | 5 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | VCC = 2.0 V; -40 °C to +125 °C | 5 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | VCC = 6.0 V; -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | V | VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 5.2 | 5.81 | V | VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.15 | 0.4 | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.16 | 0.4 | V | VI = VIH or VIL; IO = 5.2 mA; VCC = 6.0 V; -40 °C to +125 °C | 5 | |
| input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C | 5 | |
| supply current | ICC | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +125 °C | 5 | ||
| propagation delay 1In to nY, 2In to nY | tpd | 47 | 220 | ns | VCC = 2.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay 1In to nY, 2In to nY | tpd | 17 | 44 | ns | VCC = 4.5 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay 1In to nY, 2In to nY | tpd | 14 | 38 | ns | VCC = 6.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay Sn to nY | tpd | 50 | 225 | ns | VCC = 2.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay Sn to nY | tpd | 18 | 45 | ns | VCC = 4.5 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay Sn to nY | tpd | 14 | 38 | ns | VCC = 6.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay nE to nY | tpd | 33 | 150 | ns | VCC = 2.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay nE to nY | tpd | 12 | 30 | ns | VCC = 4.5 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| propagation delay nE to nY | tpd | 10 | 26 | ns | VCC = 6.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| transition time | tt | 19 | 110 | ns | VCC = 2.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| transition time | tt | 7 | 22 | ns | VCC = 4.5 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| transition time | tt | 6 | 19 | ns | VCC = 6.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 | |
| supply voltage | VCC | 2 | 5 | 6 | V | 74HC153 | 5 |
| input voltage | VI | 0 | V | 74HC153; maximum printed as VCC | 5 | ||
| output voltage | VO | 0 | V | 74HC153; maximum printed as VCC | 5 | ||
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 74HC153 | 5 |
| input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC = 2.0 V | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC = 4.5 V | 5 | |
| input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC = 6.0 V | 5 | ||
| supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| output current | IO | -25 | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 4 | |
| supply current | ICC | 50 | mA | 4 | |||
| ground current | IGND | -50 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| total power dissipation | Ptot | 500 | mW | SOT109-1 (SO16); derates linearly 12.4 mW/K above 110 °C | 4 |
CAD (KiCad official)
- Symbol:
74HC153D - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
74hc153d-etched.step/74hc153d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc153d.step/74hc153d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (14 pp, sha256
6100aafe4a5cf1a4, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC153D
**Nexperia** · Signal Switches, Multiplexers, Decoders · SOIC-16
74HC153D from Nexperia, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1E | input | Output enable input for multiplexer 1, active LOW; a HIGH on this input forces output 1Y LOW. |
| 2 | S1 | input | Common data select input (with S0) that chooses which of the four data inputs of each multiplexer is routed to its output. |
| 3 | 1I3 | input | Data input 3 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 4 | 1I2 | input | Data input 2 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 5 | 1I1 | input | Data input 1 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 6 | 1I0 | input | Data input 0 of multiplexer 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 7 | 1Y | output | Non-inverting output of multiplexer 1, following the selected data input and forced LOW when 1E is HIGH. |
| 8 | GND | power_in | Ground reference (0 V) for all voltages referenced in the datasheet. |
| 9 | 2Y | output | Non-inverting output of multiplexer 2, following the selected data input and forced LOW when 2E is HIGH. |
| 10 | 2I0 | input | Data input 0 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 11 | 2I1 | input | Data input 1 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 12 | 2I2 | input | Data input 2 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 13 | 2I3 | input | Data input 3 of multiplexer 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC. |
| 14 | S0 | input | Common data select input (with S1) that chooses which of the four data inputs of each multiplexer is routed to its output. |
| 15 | 2E | input | Output enable input for multiplexer 2, active LOW; a HIGH on this input forces output 2Y LOW. |
| 16 | VCC | power_in | Supply voltage: recommended 2.0 V to 6.0 V for 74HC153 and 4.5 V to 5.5 V for 74HCT153 (absolute maximum -0.5 V to +7 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| HIGH-level input voltage | VIH | 1.5 | 1.2 | | V | VCC = 2.0 V; -40 °C to +125 °C | 5 |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | | V | VCC = 4.5 V; -40 °C to +125 °C | 5 |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | | V | VCC = 6.0 V; -40 °C to +125 °C | 5 |
| LOW-level input voltage | VIL | | 0.8 | 0.5 | V | VCC = 2.0 V; -40 °C to +125 °C | 5 |
| LOW-level input voltage | VIL | | 2.1 | 1.35 | V | VCC = 4.5 V; -40 °C to +125 °C | 5 |
| LOW-level input voltage | VIL | | 2.8 | 1.8 | V | VCC = 6.0 V; -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 5.9 | 6 | | V | VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | | V | VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 |
| HIGH-level output voltage | VOH | 5.2 | 5.81 | | V | VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0.15 | 0.4 | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0.16 | 0.4 | V | VI = VIH or VIL; IO = 5.2 mA; VCC = 6.0 V; -40 °C to +125 °C | 5 |
| input leakage current | II | -1 | | 1 | μA | VI = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C | 5 |
| supply current | ICC | | | 160 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +125 °C | 5 |
| propagation delay 1In to nY, 2In to nY | tpd | | 47 | 220 | ns | VCC = 2.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay 1In to nY, 2In to nY | tpd | | 17 | 44 | ns | VCC = 4.5 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay 1In to nY, 2In to nY | tpd | | 14 | 38 | ns | VCC = 6.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay Sn to nY | tpd | | 50 | 225 | ns | VCC = 2.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay Sn to nY | tpd | | 18 | 45 | ns | VCC = 4.5 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay Sn to nY | tpd | | 14 | 38 | ns | VCC = 6.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay nE to nY | tpd | | 33 | 150 | ns | VCC = 2.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay nE to nY | tpd | | 12 | 30 | ns | VCC = 4.5 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| propagation delay nE to nY | tpd | | 10 | 26 | ns | VCC = 6.0 V; see Fig. 7; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| transition time | tt | | 19 | 110 | ns | VCC = 2.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| transition time | tt | | 7 | 22 | ns | VCC = 4.5 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| transition time | tt | | 6 | 19 | ns | VCC = 6.0 V; see Fig. 6; GND = 0 V; tr = tf = 6 ns; CL = 50 pF; -40 °C to +125 °C | 7 |
| supply voltage | VCC | 2 | 5 | 6 | V | 74HC153 | 5 |
| input voltage | VI | 0 | | | V | 74HC153; maximum printed as VCC | 5 |
| output voltage | VO | 0 | | | V | 74HC153; maximum printed as VCC | 5 |
| ambient temperature | Tamb | -40 | 25 | 125 | °C | 74HC153 | 5 |
| input transition rise and fall rate | Δt/ΔV | | | 625 | ns/V | VCC = 2.0 V | 5 |
| input transition rise and fall rate | Δt/ΔV | | 1.67 | 139 | ns/V | VCC = 4.5 V | 5 |
| input transition rise and fall rate | Δt/ΔV | | | 83 | ns/V | VCC = 6.0 V | 5 |
| supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| input clamping current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 |
| output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 |
| output current | IO | -25 | | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 4 |
| supply current | ICC | | | 50 | mA | | 4 |
| ground current | IGND | -50 | | | mA | | 4 |
| storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| total power dissipation | Ptot | | | 500 | mW | SOT109-1 (SO16); derates linearly 12.4 mW/K above 110 °C | 4 |
## CAD (KiCad official)
- Symbol: `74HC153D`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `74hc153d-etched.step` / `74hc153d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc153d.step` / `74hc153d.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586176225991118848) (14 pp, sha256 `6100aafe4a5cf1a4`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc153d-datasheet.pdf)