component
74HC14PW-Q100
Public Made by Adomby adom
Nexperia Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74HC14PW-Q100
Nexperia · Inverters · TSSOP-14
74HC14PW-Q100 from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of Schmitt trigger inverter 1; inputs include clamp diodes allowing current-limiting resistors to interface to voltages above VCC. |
| 2 | 1Y | output | Data output of inverter 1 (inverts 1A). |
| 3 | 2A | input | Data input of Schmitt trigger inverter 2. |
| 4 | 2Y | output | Data output of inverter 2 (inverts 2A). |
| 5 | 3A | input | Data input of Schmitt trigger inverter 3. |
| 6 | 3Y | output | Data output of inverter 3 (inverts 3A). |
| 7 | GND | power_in | Ground (0 V). |
| 8 | 4Y | output | Data output of inverter 4 (inverts 4A). |
| 9 | 4A | input | Data input of Schmitt trigger inverter 4. |
| 10 | 5Y | output | Data output of inverter 5 (inverts 5A). |
| 11 | 5A | input | Data input of Schmitt trigger inverter 5. |
| 12 | 6Y | output | Data output of inverter 6 (inverts 6A). |
| 13 | 6A | input | Data input of Schmitt trigger inverter 6. |
| 14 | VCC | power_in | Supply voltage, 2.0 V to 6.0 V recommended for 74HC14-Q100 (absolute maximum -0.5 V to +7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamping current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Output current | IO | -25 | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 4 | |
| Supply current | ICC | 50 | mA | 4 | |||
| Ground current | IGND | -50 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | TSSOP14 derates linearly with 7.3 mW/K above 81 °C | 4 | ||
| Power dissipation derating (TSSOP14) | Ptot | 7.3 | mW/K | SOT402-1 (TSSOP14), above 81 °C | 4 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 74HC14-Q100 | 4 |
| Input voltage | VI | 0 | V | max = VCC | 4 | ||
| Output voltage | VO | 0 | V | max = VCC | 4 | ||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V; Tamb -40 to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V; Tamb -40 to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V; Tamb -40 to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | V | VI = VT+ or VT-; IO = -4.0 mA; VCC = 4.5 V; Tamb -40 to +125 °C | 5 | |
| HIGH-level output voltage | VOH | 5.2 | 5.81 | V | VI = VT+ or VT-; IO = -5.2 mA; VCC = 6.0 V; Tamb -40 to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V; Tamb -40 to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.15 | 0.4 | V | VI = VT+ or VT-; IO = 4.0 mA; VCC = 4.5 V; Tamb -40 to +125 °C | 5 | |
| LOW-level output voltage | VOL | 0.16 | 0.4 | V | VI = VT+ or VT-; IO = 5.2 mA; VCC = 6.0 V; Tamb -40 to +125 °C | 5 | |
| Input leakage current | II | -1 | 1 | μA | VI = VCC or GND; VCC = 6.0 V; Tamb -40 to +125 °C | 5 | |
| Supply current | ICC | 40 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; Tamb -40 to +125 °C | 5 | ||
| Input capacitance | CI | 3.5 | pF | Tamb = 25 °C | 5 | ||
| Propagation delay nA to nY | tpd | 41 | 190 | ns | VCC = 2.0 V; CL = 50 pF; Tamb -40 to +125 °C | 6 | |
| Propagation delay nA to nY | tpd | 15 | 38 | ns | VCC = 4.5 V; CL = 50 pF; Tamb -40 to +125 °C | 6 | |
| Propagation delay nA to nY | tpd | 12 | 32 | ns | VCC = 6.0 V; CL = 50 pF; Tamb -40 to +125 °C | 6 | |
| Propagation delay nA to nY | tpd | 12 | ns | VCC = 5.0 V; CL = 15 pF; Tamb = 25 °C | 6 | ||
| Transition time | tt | 19 | 110 | ns | VCC = 2.0 V; Tamb -40 to +125 °C | 6 | |
| Transition time | tt | 7 | 22 | ns | VCC = 4.5 V; Tamb -40 to +125 °C | 6 | |
| Transition time | tt | 6 | 19 | ns | VCC = 6.0 V; Tamb -40 to +125 °C | 6 | |
| Power dissipation capacitance | CPD | 7 | pF | per package; VI = GND to VCC; Tamb = 25 °C | 6 | ||
| Positive-going threshold voltage | VT+ | 0.7 | 1.18 | 1.5 | V | VCC = 2.0 V; Tamb -40 to +125 °C | 8 |
| Positive-going threshold voltage | VT+ | 1.7 | 2.38 | 3.15 | V | VCC = 4.5 V; Tamb -40 to +125 °C | 8 |
| Positive-going threshold voltage | VT+ | 2.1 | 3.14 | 4.2 | V | VCC = 6.0 V; Tamb -40 to +125 °C | 8 |
| Negative-going threshold voltage | VT- | 0.3 | 0.52 | 0.9 | V | VCC = 2.0 V; Tamb -40 to +125 °C | 8 |
| Negative-going threshold voltage | VT- | 0.9 | 1.4 | 2 | V | VCC = 4.5 V; Tamb -40 to +125 °C | 8 |
| Negative-going threshold voltage | VT- | 1.2 | 1.89 | 2.6 | V | VCC = 6.0 V; Tamb -40 to +125 °C | 8 |
| Hysteresis voltage | VH | 0.2 | 0.66 | 1 | V | VCC = 2.0 V; Tamb -40 to +125 °C | 8 |
| Hysteresis voltage | VH | 0.4 | 0.98 | 1.4 | V | VCC = 4.5 V; Tamb -40 to +125 °C | 8 |
| Hysteresis voltage | VH | 0.6 | 1.25 | 1.6 | V | VCC = 6.0 V; Tamb -40 to +125 °C | 8 |
CAD (KiCad official)
- Symbol:
74HC14PW-Q100 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc14pw-q100-etched.step/74hc14pw-q100-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc14pw-q100.step/74hc14pw-q100.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
d5e3c66256a41e05, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC14PW-Q100
**Nexperia** · Inverters · TSSOP-14
74HC14PW-Q100 from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of Schmitt trigger inverter 1; inputs include clamp diodes allowing current-limiting resistors to interface to voltages above VCC. |
| 2 | 1Y | output | Data output of inverter 1 (inverts 1A). |
| 3 | 2A | input | Data input of Schmitt trigger inverter 2. |
| 4 | 2Y | output | Data output of inverter 2 (inverts 2A). |
| 5 | 3A | input | Data input of Schmitt trigger inverter 3. |
| 6 | 3Y | output | Data output of inverter 3 (inverts 3A). |
| 7 | GND | power_in | Ground (0 V). |
| 8 | 4Y | output | Data output of inverter 4 (inverts 4A). |
| 9 | 4A | input | Data input of Schmitt trigger inverter 4. |
| 10 | 5Y | output | Data output of inverter 5 (inverts 5A). |
| 11 | 5A | input | Data input of Schmitt trigger inverter 5. |
| 12 | 6Y | output | Data output of inverter 6 (inverts 6A). |
| 13 | 6A | input | Data input of Schmitt trigger inverter 6. |
| 14 | VCC | power_in | Supply voltage, 2.0 V to 6.0 V recommended for 74HC14-Q100 (absolute maximum -0.5 V to +7 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic ICs |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| Input clamping current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 |
| Output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 |
| Output current | IO | -25 | | 25 | mA | -0.5 V < VO < VCC + 0.5 V | 4 |
| Supply current | ICC | | | 50 | mA | | 4 |
| Ground current | IGND | -50 | | | mA | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Total power dissipation | Ptot | | | 500 | mW | TSSOP14 derates linearly with 7.3 mW/K above 81 °C | 4 |
| Power dissipation derating (TSSOP14) | Ptot | | 7.3 | | mW/K | SOT402-1 (TSSOP14), above 81 °C | 4 |
| Supply voltage | VCC | 2 | 5 | 6 | V | 74HC14-Q100 | 4 |
| Input voltage | VI | 0 | | | V | max = VCC | 4 |
| Output voltage | VO | 0 | | | V | max = VCC | 4 |
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | | 4 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | VI = VT+ or VT-; IO = -20 μA; VCC = 2.0 V; Tamb -40 to +125 °C | 5 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | VI = VT+ or VT-; IO = -20 μA; VCC = 4.5 V; Tamb -40 to +125 °C | 5 |
| HIGH-level output voltage | VOH | 5.9 | 6 | | V | VI = VT+ or VT-; IO = -20 μA; VCC = 6.0 V; Tamb -40 to +125 °C | 5 |
| HIGH-level output voltage | VOH | 3.7 | 4.32 | | V | VI = VT+ or VT-; IO = -4.0 mA; VCC = 4.5 V; Tamb -40 to +125 °C | 5 |
| HIGH-level output voltage | VOH | 5.2 | 5.81 | | V | VI = VT+ or VT-; IO = -5.2 mA; VCC = 6.0 V; Tamb -40 to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | VI = VT+ or VT-; IO = 20 μA; VCC = 2.0 V; Tamb -40 to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0.15 | 0.4 | V | VI = VT+ or VT-; IO = 4.0 mA; VCC = 4.5 V; Tamb -40 to +125 °C | 5 |
| LOW-level output voltage | VOL | | 0.16 | 0.4 | V | VI = VT+ or VT-; IO = 5.2 mA; VCC = 6.0 V; Tamb -40 to +125 °C | 5 |
| Input leakage current | II | -1 | | 1 | μA | VI = VCC or GND; VCC = 6.0 V; Tamb -40 to +125 °C | 5 |
| Supply current | ICC | | | 40 | μA | VI = VCC or GND; IO = 0 A; VCC = 6.0 V; Tamb -40 to +125 °C | 5 |
| Input capacitance | CI | | 3.5 | | pF | Tamb = 25 °C | 5 |
| Propagation delay nA to nY | tpd | | 41 | 190 | ns | VCC = 2.0 V; CL = 50 pF; Tamb -40 to +125 °C | 6 |
| Propagation delay nA to nY | tpd | | 15 | 38 | ns | VCC = 4.5 V; CL = 50 pF; Tamb -40 to +125 °C | 6 |
| Propagation delay nA to nY | tpd | | 12 | 32 | ns | VCC = 6.0 V; CL = 50 pF; Tamb -40 to +125 °C | 6 |
| Propagation delay nA to nY | tpd | | 12 | | ns | VCC = 5.0 V; CL = 15 pF; Tamb = 25 °C | 6 |
| Transition time | tt | | 19 | 110 | ns | VCC = 2.0 V; Tamb -40 to +125 °C | 6 |
| Transition time | tt | | 7 | 22 | ns | VCC = 4.5 V; Tamb -40 to +125 °C | 6 |
| Transition time | tt | | 6 | 19 | ns | VCC = 6.0 V; Tamb -40 to +125 °C | 6 |
| Power dissipation capacitance | CPD | | 7 | | pF | per package; VI = GND to VCC; Tamb = 25 °C | 6 |
| Positive-going threshold voltage | VT+ | 0.7 | 1.18 | 1.5 | V | VCC = 2.0 V; Tamb -40 to +125 °C | 8 |
| Positive-going threshold voltage | VT+ | 1.7 | 2.38 | 3.15 | V | VCC = 4.5 V; Tamb -40 to +125 °C | 8 |
| Positive-going threshold voltage | VT+ | 2.1 | 3.14 | 4.2 | V | VCC = 6.0 V; Tamb -40 to +125 °C | 8 |
| Negative-going threshold voltage | VT- | 0.3 | 0.52 | 0.9 | V | VCC = 2.0 V; Tamb -40 to +125 °C | 8 |
| Negative-going threshold voltage | VT- | 0.9 | 1.4 | 2 | V | VCC = 4.5 V; Tamb -40 to +125 °C | 8 |
| Negative-going threshold voltage | VT- | 1.2 | 1.89 | 2.6 | V | VCC = 6.0 V; Tamb -40 to +125 °C | 8 |
| Hysteresis voltage | VH | 0.2 | 0.66 | 1 | V | VCC = 2.0 V; Tamb -40 to +125 °C | 8 |
| Hysteresis voltage | VH | 0.4 | 0.98 | 1.4 | V | VCC = 4.5 V; Tamb -40 to +125 °C | 8 |
| Hysteresis voltage | VH | 0.6 | 1.25 | 1.6 | V | VCC = 6.0 V; Tamb -40 to +125 °C | 8 |
## CAD (KiCad official)
- Symbol: `74HC14PW-Q100`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74hc14pw-q100-etched.step` / `74hc14pw-q100-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc14pw-q100.step` / `74hc14pw-q100.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74HC14PW-Q100.pdf) (17 pp, sha256 `d5e3c66256a41e05`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc14pw-q100-datasheet.pdf)