main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers 74hc14mt: viewers · Ray 5d ago
74hc14mt-etched.glb Publish 0.1.0 · Ray 5d ago
74hc14mt-etched.step 74hc14mt: factory component page (tier=lcsc) · Ray 5d ago
74hc14mt-hero.glb 74hc14mt: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
74hc14mt-hero.overlay.json Publish 0.1.0 · Ray 5d ago
74hc14mt.glb Publish 0.1.0 · Ray 5d ago
74hc14mt.kicad_mod Publish 0.1.0 · Ray 5d ago
74hc14mt.kicad_sym Publish 0.1.0 · Ray 5d ago
74hc14mt.lbr Publish 0.1.0 · Ray 5d ago
74hc14mt.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago

74HC14MT

HGSEMI · Inverters · TSSOP-14

74HC14MT from HGSEMI, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Schmitt-trigger inverter 1 data input; recommended input voltage range is 0 V to VCC.
2 1Y output Schmitt-trigger inverter 1 data output, the logical inverse of 1A.
3 2A input Schmitt-trigger inverter 2 data input; recommended input voltage range is 0 V to VCC.
4 2Y output Schmitt-trigger inverter 2 data output, the logical inverse of 2A.
5 3A input Schmitt-trigger inverter 3 data input; recommended input voltage range is 0 V to VCC.
6 3Y output Schmitt-trigger inverter 3 data output, the logical inverse of 3A.
7 GND power_in System ground (0 V reference) for all inverters.
8 4Y output Schmitt-trigger inverter 4 data output, the logical inverse of 4A.
9 4A input Schmitt-trigger inverter 4 data input; recommended input voltage range is 0 V to VCC.
10 5Y output Schmitt-trigger inverter 5 data output, the logical inverse of 5A.
11 5A input Schmitt-trigger inverter 5 data input; recommended input voltage range is 0 V to VCC.
12 6Y output Schmitt-trigger inverter 6 data output, the logical inverse of 6A.
13 6A input Schmitt-trigger inverter 6 data input; recommended input voltage range is 0 V to VCC.
14 VCC power_in Positive supply; recommended supply range 2.0 V to 6.0 V, absolute maximum 7 V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (recommended) VCC 2 5 6 V 4
Input voltage (recommended) VI 0 V 4
Output voltage (recommended) VO 0 V 4
Operating ambient temperature Tamb -40 25 85 °C 4
Supply voltage (absolute maximum) VCC -0.5 7 V 3
Diode input current Ilk -20 20 mA VI<-0.5V or VI>VCC+0.5V 3
Diode output current Iok -20 20 mA Vo<-0.5V or Vo>VCC+0.5V 3
Output or sink current Io -25 25 mA -0.5V< Vo <VCC+0.5V 3
VCC or GND current ICC, IGND 50 mA 3
Storage temperature Tstg -65 125 °C 3
Soldering temperature TL 260 °C 10 s 3
High-level output voltage VOH 1.9 2 V Tamb=25°C; VI=VIH or VIL; VCC=2.0V, IO=-20uA 4
High-level output voltage VOH 4.4 4.5 V Tamb=25°C; VI=VIH or VIL; VCC=4.5V, IO=-20uA 4
High-level output voltage VOH 5.9 6 V Tamb=25°C; VI=VIH or VIL; VCC=6.0V, IO=-20uA 4
High-level output voltage VOH 3.98 4.32 V Tamb=25°C; VI=VIH or VIL; VCC=4.5V, IO=-4.0mA 4
High-level output voltage VOH 5.48 5.81 V Tamb=25°C; VI=VIH or VIL; VCC=6.0V, IO=-5.2mA 4
Low-level output voltage VOL 0 0.1 V Tamb=25°C; VI=VIH or VIL; VCC=2.0V, IO=20uA 4
Low-level output voltage VOL 0.15 0.26 V Tamb=25°C; VI=VIH or VIL; VCC=4.5V, IO=4.0mA 4
Low-level output voltage VOL 0.16 0.26 V Tamb=25°C; VI=VIH or VIL; VCC=6.0V, IO=5.2mA 4
Input leakage current ILI 0.1 uA Tamb=25°C; VCC=6.0V, VI=VCC or GND 4
Quiescent supply current ICC 2 uA Tamb=25°C; VCC=6.0V, VI=VCC or GND; IO=0 4
High-level output voltage VOH 1.9 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=2.0V, IO=-20uA 4
High-level output voltage VOH 4.4 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=4.5V, IO=-20uA 4
High-level output voltage VOH 5.9 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=6.0V, IO=-20uA 4
High-level output voltage VOH 3.84 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=4.5V, IO=-4.0mA 4
High-level output voltage VOH 5.34 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=6.0V, IO=-5.2mA 4
Low-level output voltage VOL 0.1 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=2.0V, IO=20uA 4
Low-level output voltage VOL 0.33 V Tamb=-40 to +85°C; VI=VIH or VIL; VCC=4.5V, IO=4.0mA 4
Input leakage current ILI 1 uA Tamb=-40 to +85°C; VCC=6.0V, VI=VCC or GND 4
Quiescent supply current ICC 20 uA Tamb=-40 to +85°C; VCC=6.0V, VI=VCC or GND; IO=0 4
Positive-going threshold voltage VT+ 0.7 1.18 1.5 V Tamb=25°C; see Fig. 4, 5; VCC=2.0V 5
Positive-going threshold voltage VT+ 1.7 2.38 3.15 V Tamb=25°C; see Fig. 4, 5; VCC=4.5V 5
Positive-going threshold voltage VT+ 2.1 3.14 4.2 V Tamb=25°C; see Fig. 4, 5; VCC=6.0V 5
Negative-going threshold voltage VT- 0.3 0.52 0.9 V Tamb=25°C; see Fig. 4, 5; VCC=2.0V 5
Negative-going threshold voltage VT- 0.9 1.4 2 V Tamb=25°C; see Fig. 4, 5; VCC=4.5V 5
Negative-going threshold voltage VT- 1.2 1.89 2.6 V Tamb=25°C; see Fig. 4, 5; VCC=6.0V 5
Hysteresis voltage (VT+ to VT-) VH 0.2 0.68 1 V Tamb=25°C; see Fig. 4, 5; VCC=2.0V 5
Hysteresis voltage (VT+ to VT-) VH 0.4 0.98 1.4 V Tamb=25°C; see Fig. 4, 5; VCC=4.5V 5
Hysteresis voltage (VT+ to VT-) VH 0.6 1.25 1.6 V Tamb=25°C; see Fig. 4, 5; VCC=6.0V 5
Positive-going threshold voltage VT+ 0.7 1.5 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=2.0V 5
Positive-going threshold voltage VT+ 1.7 3.15 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=4.5V 5
Positive-going threshold voltage VT+ 2.1 4.2 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=6.0V 5
Negative-going threshold voltage VT- 0.3 0.9 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=2.0V 5
Negative-going threshold voltage VT- 0.9 2 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=4.5V 5
Negative-going threshold voltage VT- 1.2 2.6 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=6.0V 5
Hysteresis voltage (VT+ to VT-) VH 0.2 1 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=2.0V 5
Hysteresis voltage (VT+ to VT-) VH 0.4 1.4 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=4.5V 5
Hysteresis voltage (VT+ to VT-) VH 0.6 1.6 V Tamb=-40 to +85°C; see Fig. 4, 5; VCC=6.0V 5
Propagation delay nA to nY tPHL/tPLH 155 ns Tamb=-40 to +85°C; GND=0; tr=tf=6.0ns; CL=50pF; see Fig. 6, 7; VCC=2.0V 5
Propagation delay nA to nY tPHL/tPLH 31 ns Tamb=-40 to +85°C; GND=0; tr=tf=6.0ns; CL=50pF; see Fig. 6, 7; VCC=4.5V 5
Propagation delay nA to nY tPHL/tPLH 26 ns Tamb=-40 to +85°C; GND=0; tr=tf=6.0ns; CL=50pF; see Fig. 6, 7; VCC=6.0V 5
Output transition time tTHL/tTLH 95 ns Tamb=-40 to +85°C; GND=0; tr=tf=6.0ns; CL=50pF; see Fig. 6, 7; VCC=2.0V 5
Output transition time tTHL/tTLH 19 ns Tamb=-40 to +85°C; GND=0; tr=tf=6.0ns; CL=50pF; see Fig. 6, 7; VCC=4.5V 5
Output transition time tTHL/tTLH 15 ns Tamb=-40 to +85°C; GND=0; tr=tf=6.0ns; CL=50pF; see Fig. 6, 7; VCC=6.0V 5

CAD (KiCad official)

  • Symbol: 74HC14MT
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74hc14mt-etched.step / 74hc14mt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc14mt.step / 74hc14mt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (10 pp, sha256 c0eec1c255f8c0cd, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF