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74HC138DRG

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HANSCHIP semiconductor Signal Switches, Multiplexers, Decoders, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC138DRG

HANSCHIP semiconductor · Signal Switches, Multiplexers, Decoders · SOP-16

74HC138DRG from HANSCHIP semiconductor, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Data/address input A, the least significant bit of the 3-bit binary select code that chooses one of the eight outputs.
2 B input Data/address input B, the middle bit of the 3-bit binary select code that chooses one of the eight outputs.
3 C input Data/address input C, the most significant bit of the 3-bit binary select code that chooses one of the eight outputs.
4 G2B input Active-low enable input; combined with G2A as G2 = G2A + G2B, the decoder is enabled only when both G2A and G2B are low (together with G1 high).
5 G2A input Active-low enable input; combined with G2B as G2 = G2A + G2B, the decoder is enabled only when both G2A and G2B are low (together with G1 high).
6 G1 input Active-high enable input; the decoder outputs are enabled only when G1 is high (together with G2A and G2B low).
7 Y7 output Decoded active-low output 7 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
8 GND power_in Power ground pin.
9 Y6 output Decoded active-low output 6 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
10 Y5 output Decoded active-low output 5 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
11 Y4 output Decoded active-low output 4 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
12 Y3 output Decoded active-low output 3 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
13 Y2 output Decoded active-low output 2 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
14 Y1 output Decoded active-low output 1 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
15 Y0 output Decoded active-low output 0 of the 8-bit parallel output set Y0 to Y7; goes low when selected and enabled.
16 VCC power_in Positive power supply pin.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 (Supply voltage) VCC -0.5 6.5 V 4
输入/输出电压 (Input/output voltage) VIN、VOUT -0.5 V 4
输入/输出钳位电流 (Input/output clamp current) IIK、IOK 20 mA 4
单个管脚输出电流 (Output current per pin) IOUT 25 mA 4
单个管脚接 VCC 或 GND 电流 (Current per pin to VCC or GND) ICC 50 mA 4
耗散功率 (Power dissipation) PD 500 mW 4
工作温度 (Operating temperature) TA -40 85 ℃ 4
存储温度 (Storage temperature) TS -65 150 ℃ 4
引脚焊接温度 (Lead soldering temperature) TL 245 ℃ 10 s 4
电源电压 (Supply voltage) VCC 2 5 6 V 4
输入输出电压 (Input/output voltage) VIN、Vout 0 V 4
输入上升/下降时间 (Input rise/fall time) tr tf 0 1000 ns VCC=2.0V 4
输入上升/下降时间 (Input rise/fall time) tr tf 0 500 ns VCC=4.5V 4
输入上升/下降时间 (Input rise/fall time) tr tf 0 400 ns VCC=6.0V 4
高电平有效输入电压 (High-level input voltage) VIH 1.5 V TA=25℃; VCC=2.0V 5
高电平有效输入电压 (High-level input voltage) VIH 3.15 V TA=25℃; VCC=4.5V 5
高电平有效输入电压 (High-level input voltage) VIH 4.2 V TA=25℃; VCC=6.0V 5
低电平有效输入电压 (Low-level input voltage) VIL 0.5 V TA=25℃; VCC=2.0V 5
低电平有效输入电压 (Low-level input voltage) VIL 1.35 V TA=25℃; VCC=4.5V 5
低电平有效输入电压 (Low-level input voltage) VIL 1.8 V TA=25℃; VCC=6.0V 5
高电平输出电压 (High-level output voltage) VOH 1.9 V TA=25℃; VI= VIH or VIL; IOH=20μA; VCC=2.0V 5
高电平输出电压 (High-level output voltage) VOH 4.4 V TA=25℃; VI= VIH or VIL; IOH=20μA; VCC=4.5V 5
高电平输出电压 (High-level output voltage) VOH 5.9 V TA=25℃; VI= VIH or VIL; IOH=20μA; VCC=6.0V 5
高电平输出电压 (High-level output voltage) VOH 3.9 4.3 V TA=25℃; VI= VIH or VIL; IOH=4.0mA; VCC=4.5V 5
高电平输出电压 (High-level output voltage) VOH 5.2 5.7 V TA=25℃; VI= VIH or VIL; IOH=5.2mA; VCC=6.0V 5
低电平输出电压 (Low-level output voltage) VOL 0.1 V TA=25℃; VI= VIH or VIL; IOH=20μA; VCC=2.0V 5
低电平输出电压 (Low-level output voltage) VOL 0.2 0.5 V TA=25℃; VI= VIH or VIL; IOH=4.0mA; VCC=4.5V 5
低电平输出电压 (Low-level output voltage) VOL 0.3 0.5 V TA=25℃; VI= VIH or VIL; IOH=5.2mA; VCC=6.0V 5
输入电流 (Input current) IIN 1 uA TA=25℃; VI=VCC or GND; VCC=6.0V 5
工作电流 (Operating/supply current) ICC 5 uA TA=25℃; VI=VCC or GND; IOUT=0μA; VCC=6.0V 5
传输延迟时间 (Propagation delay) A、B、C to Output, high-to-low tPHL 24 ns Ta=25℃; VCC=5.0V; CL=16pF; tr=tf≤20ns 5
传输延迟时间 (Propagation delay) A、B、C to Output, low-to-high tPLH 18 ns Ta=25℃; VCC=5.0V; CL=16pF; tr=tf≤20ns 5
传输延迟时间 (Propagation delay) G1 to Output, high-to-low tPHL 25 ns Ta=25℃; VCC=5.0V; CL=16pF; tr=tf≤20ns 5
传输延迟时间 (Propagation delay) G1 to Output, low-to-high tPLH 17 ns Ta=25℃; VCC=5.0V; CL=16pF; tr=tf≤20ns 5
传输延迟时间 (Propagation delay) G2A、G2B to Output, high-to-low tPHL 22 ns Ta=25℃; VCC=5.0V; CL=16pF; tr=tf≤20ns 5
传输延迟时间 (Propagation delay) G2A、G2B to Output, low-to-high tPLH 18 ns Ta=25℃; VCC=5.0V; CL=16pF; tr=tf≤20ns 5

CAD (KiCad official)

  • Symbol: 74HC138DRG
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc138drg-etched.step / 74hc138drg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc138drg.step / 74hc138drg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (10 pp, sha256 ff89870c2a241011, retrieved 2026-10-15, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF