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74HC123PW

Public Made by Adom

by adom

Nexperia Monostable Multivibrators, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74HC123PW

Nexperia · Monostable Multivibrators · TSSOP-16

74HC123PW from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Negative-edge triggered input 1 (nA input of monostable 1).
2 1B input Positive-edge triggered input 1 (nB input of monostable 1).
3 1RD input Direct reset input 1: LOW-level reset terminates the output pulse, and the input is also positive-edge triggered.
4 1Q output Active LOW output 1 (complementary output of monostable 1, the pin printed with the overbar on the symbol).
5 2Q output Active HIGH output 2 (true output of monostable 2).
6 2CEXT passive External capacitor connection 2; the datasheet recommends grounding it externally to pin 8 (GND) for minimum noise generation.
7 2REXT/CEXT passive External resistor and capacitor connection 2 for setting the output pulse width of monostable 2 (REXT 2 kΩ to 1000 kΩ at VCC = 5.0 V).
8 GND power_in Ground (0 V) reference for all voltages.
9 2A input Negative-edge triggered input 2 (nA input of monostable 2).
10 2B input Positive-edge triggered input 2 (nB input of monostable 2).
11 2RD input Direct reset input 2: LOW-level reset terminates the output pulse, and the input is also positive-edge triggered.
12 2Q output Active LOW output 2 (complementary output of monostable 2, the pin printed with the overbar on the symbol).
13 1Q output Active HIGH output 1 (true output of monostable 1).
14 1CEXT passive External capacitor connection 1; the datasheet recommends grounding it externally to pin 8 (GND) for minimum noise generation.
15 1REXT/CEXT passive External resistor and capacitor connection 1 for setting the output pulse width of monostable 1 (REXT 2 kΩ to 1000 kΩ at VCC = 5.0 V).
16 VCC power_in Supply voltage: 2.0 V to 6.0 V for 74HC123PW and 4.5 V to 5.5 V for 74HCT123PW (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 6
Input clamping current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 6
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 6
Output current except pins nREXT/CEXT IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 6
Supply current ICC 50 mA 6
Ground current IGND -50 mA 6
Storage temperature Tstg -65 150 °C 6
Total power dissipation Ptot 500 mW Derates linearly 8.5 mW/K above 91 °C (SOT403-1 TSSOP16) 6
Supply voltage VCC 2 5 6 V 6
Input voltage VI 0 V 6
Output voltage VO 0 V 6
Input transition rise and fall rate (nRD input) Δt/ΔV 625 ns/V VCC = 2.0 V 6
Input transition rise and fall rate (nRD input) Δt/ΔV 1.67 139 ns/V VCC = 4.5 V 6
Input transition rise and fall rate (nRD input) Δt/ΔV 83 ns/V VCC = 6.0 V 6
Ambient temperature Tamb -40 25 125 °C 6
HIGH-level input voltage VIH 1.5 V VCC = 2.0 V; Tamb -40 °C to +125 °C 6
HIGH-level input voltage VIH 3.15 V VCC = 4.5 V; Tamb -40 °C to +125 °C 6
HIGH-level input voltage VIH 4.2 V VCC = 6.0 V; Tamb -40 °C to +125 °C 6
LOW-level input voltage VIL 0.5 V VCC = 2.0 V; Tamb -40 °C to +125 °C 6
LOW-level input voltage VIL 1.35 V VCC = 4.5 V; Tamb -40 °C to +125 °C 6
LOW-level input voltage VIL 1.8 V VCC = 6.0 V; Tamb -40 °C to +125 °C 6
HIGH-level output voltage VOH 1.9 V VI = VIH or VIL; IO = -20 μA; VCC = 2.0 V; Tamb -40 °C to +125 °C 7
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; IO = -20 μA; VCC = 4.5 V; Tamb -40 °C to +125 °C 7
HIGH-level output voltage VOH 5.9 V VI = VIH or VIL; IO = -20 μA; VCC = 6.0 V; Tamb -40 °C to +125 °C 7
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -4 mA; VCC = 4.5 V; Tamb -40 °C to +125 °C 7
HIGH-level output voltage VOH 5.2 V VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; Tamb -40 °C to +125 °C 7
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 20 μA; VCC = 2.0 V; Tamb -40 °C to +125 °C 7
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO = 4 mA; VCC = 4.5 V; Tamb -40 °C to +125 °C 7
Input leakage current II -1 1 μA VI = VCC or GND; VCC = 6.0 V; Tamb -40 °C to +125 °C 7
Supply current ICC 160 μA VI = VCC or GND; IO = 0 A; VCC = 6.0 V; Tamb -40 °C to +125 °C 7
Propagation delay nRD, nA, nB to nQ or nQ tpd 385 ns CEXT = 0 pF; REXT = 5 kΩ; see Fig. 7; VCC = 2.0 V; Tamb -40 °C to +125 °C 8
Propagation delay nRD, nA, nB to nQ or nQ tpd 77 ns CEXT = 0 pF; REXT = 5 kΩ; see Fig. 7; VCC = 4.5 V; Tamb -40 °C to +125 °C 8
Propagation delay nRD, nA, nB to nQ or nQ tpd 65 ns CEXT = 0 pF; REXT = 5 kΩ; see Fig. 7; VCC = 6.0 V; Tamb -40 °C to +125 °C 8
Propagation delay nRD (reset) to nQ or nQ tpd 325 ns CEXT = 0 pF; REXT = 5 kΩ; see Fig. 7; VCC = 2.0 V; Tamb -40 °C to +125 °C 8
Propagation delay nRD (reset) to nQ or nQ tpd 65 ns CEXT = 0 pF; REXT = 5 kΩ; see Fig. 7; VCC = 4.5 V; Tamb -40 °C to +125 °C 8
Propagation delay nRD (reset) to nQ or nQ tpd 55 ns CEXT = 0 pF; REXT = 5 kΩ; see Fig. 7; VCC = 6.0 V; Tamb -40 °C to +125 °C 8
Transition time tt 110 ns see Fig. 7; VCC = 2.0 V; Tamb -40 °C to +125 °C 8
Transition time tt 22 ns see Fig. 7; VCC = 4.5 V; Tamb -40 °C to +125 °C 8
Transition time tt 19 ns see Fig. 7; VCC = 6.0 V; Tamb -40 °C to +125 °C 8
Pulse width, nA LOW (input) 150 ns nA LOW; see Fig. 8; VCC = 2.0 V; Tamb -40 °C to +125 °C 8
Pulse width, nA LOW (input) 30 ns nA LOW; see Fig. 8; VCC = 4.5 V; Tamb -40 °C to +125 °C 8
Pulse width, nA LOW (input) 26 ns nA LOW; see Fig. 8; VCC = 6.0 V; Tamb -40 °C to +125 °C 8
Pulse width, nB HIGH (input) 150 ns nB HIGH; see Fig. 8; VCC = 2.0 V; Tamb -40 °C to +125 °C 8
Pulse width, nB HIGH (input) 30 ns nB HIGH; see Fig. 8; VCC = 4.5 V; Tamb -40 °C to +125 °C 8
Pulse width, nB HIGH (input) 26 ns nB HIGH; see Fig. 8; VCC = 6.0 V; Tamb -40 °C to +125 °C 8
Pulse width, nRD LOW (input) 150 ns nRD LOW; see Fig. 9; VCC = 2.0 V; Tamb -40 °C to +125 °C 8
Pulse width, nRD LOW (input) 30 ns nRD LOW; see Fig. 9; VCC = 4.5 V; Tamb -40 °C to +125 °C 8
Pulse width, nRD LOW (input) 26 ns nRD LOW; see Fig. 9; VCC = 6.0 V; Tamb -40 °C to +125 °C 8
External timing resistor REXT 10 1000 kΩ see Fig. 5; VCC = 2.0 V; Tamb 25 °C column 9
External timing resistor REXT 2 1000 kΩ see Fig. 5; VCC = 5.0 V; Tamb 25 °C column 9
Input capacitance CI 3.5 pF 7
Power dissipation capacitance CPD 54 pF per monostable; VI = GND to VCC 9

CAD (KiCad official)

  • Symbol: 74HC123PW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: 74hc123pw-etched.step / 74hc123pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc123pw.step / 74hc123pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (20 pp, sha256 0b5ba7a32cf4830a, retrieved 2026-11-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF