component
74HC08DN
Public Made by Adomby adom
HGSEMI Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74HC08DN
HGSEMI · Logic Gates · DIP-14
74HC08DN from HGSEMI, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Data input A of 2-input AND gate 1; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 2 | B1 | input | Data input B of 2-input AND gate 1; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 3 | Y1 | output | Push-pull buffered output of AND gate 1; absolute maximum output current per pin is 25 mA. |
| 4 | A2 | input | Data input A of 2-input AND gate 2; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 5 | B2 | input | Data input B of 2-input AND gate 2; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 6 | Y2 | output | Push-pull buffered output of AND gate 2; absolute maximum output current per pin is 25 mA. |
| 7 | GND | power_in | Ground reference pin; the absolute maximum VCC or GND current is 50 mA. |
| 8 | Y3 | output | Push-pull buffered output of AND gate 3; absolute maximum output current per pin is 25 mA. |
| 9 | A3 | input | Data input A of 2-input AND gate 3; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 10 | B3 | input | Data input B of 2-input AND gate 3; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 11 | Y4 | output | Push-pull buffered output of AND gate 4; absolute maximum output current per pin is 25 mA. |
| 12 | A4 | input | Data input A of 2-input AND gate 4; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 13 | B4 | input | Data input B of 2-input AND gate 4; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 14 | VCC | power_in | Supply pin; operating range is 2.0 V to 6.0 V, with an absolute maximum of 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
74HC08DN - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc08dn-etched.step/74hc08dn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc08dn.step/74hc08dn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (9 pp, sha256
7030fd5fd25d7ce9, retrieved 2026-10-13, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC08DN
**HGSEMI** · Logic Gates · DIP-14
74HC08DN from HGSEMI, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Data input A of 2-input AND gate 1; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 2 | B1 | input | Data input B of 2-input AND gate 1; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 3 | Y1 | output | Push-pull buffered output of AND gate 1; absolute maximum output current per pin is 25 mA. |
| 4 | A2 | input | Data input A of 2-input AND gate 2; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 5 | B2 | input | Data input B of 2-input AND gate 2; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 6 | Y2 | output | Push-pull buffered output of AND gate 2; absolute maximum output current per pin is 25 mA. |
| 7 | GND | power_in | Ground reference pin; the absolute maximum VCC or GND current is 50 mA. |
| 8 | Y3 | output | Push-pull buffered output of AND gate 3; absolute maximum output current per pin is 25 mA. |
| 9 | A3 | input | Data input A of 2-input AND gate 3; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 10 | B3 | input | Data input B of 2-input AND gate 3; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 11 | Y4 | output | Push-pull buffered output of AND gate 4; absolute maximum output current per pin is 25 mA. |
| 12 | A4 | input | Data input A of 2-input AND gate 4; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 13 | B4 | input | Data input B of 2-input AND gate 4; inputs are specified to stay between 0 V and VCC, with input current at most 1 uA at VCC = 6.0 V. |
| 14 | VCC | power_in | Supply pin; operating range is 2.0 V to 6.0 V, with an absolute maximum of 6.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `74HC08DN`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `74hc08dn-etched.step` / `74hc08dn-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc08dn.step` / `74hc08dn.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603357099041189888) (9 pp, sha256 `7030fd5fd25d7ce9`, retrieved 2026-10-13, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc08dn-datasheet.pdf)