component
74HC08DM
Public Made by Adomby adom
HGSEMI Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74HC08DM
HGSEMI · Logic Gates · SOP-14
74HC08DM from HGSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input A of gate 1 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 2 | B1 | input | Input B of gate 1 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 3 | Y1 | output | Push-pull buffered output of gate 1; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 4 | A2 | input | Input A of gate 2 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 5 | B2 | input | Input B of gate 2 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 6 | Y2 | output | Push-pull buffered output of gate 2; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 7 | GND | power_in | Ground reference for the device; combined VCC or GND current is limited to 50 mA absolute maximum. |
| 8 | Y3 | output | Push-pull buffered output of gate 3; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 9 | A3 | input | Input A of gate 3 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 10 | B3 | input | Input B of gate 3 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 11 | Y4 | output | Push-pull buffered output of gate 4; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 12 | A4 | input | Input A of gate 4 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 13 | B4 | input | Input B of gate 4 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 14 | VCC | power_in | Positive supply; operating range is 2.0 V to 6.0 V, with an absolute maximum of 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level input voltage | VIH | 1.5 | V | VCC=2.0V, TA=25℃ | 4 | ||
| High-level input voltage | VIH | 3.15 | V | VCC=4.5V, TA=25℃ | 4 | ||
| High-level input voltage | VIH | 4.2 | V | VCC=6.0V, TA=25℃ | 4 | ||
| Low-level input voltage | VIL | 0.5 | V | VCC=2.0V, TA=25℃ | 4 | ||
| Low-level input voltage | VIL | 1.35 | V | VCC=4.5V, TA=25℃ | 4 | ||
| Low-level input voltage | VIL | 1.8 | V | VCC=6.0V, TA=25℃ | 4 | ||
| High-level output voltage | VOH | 1.9 | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=2.0V, TA=25℃ | 4 | ||
| High-level output voltage | VOH | 4.4 | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=4.5V, TA=25℃ | 4 | ||
| High-level output voltage | VOH | 5.9 | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=6.0V, TA=25℃ | 4 | ||
| High-level output voltage | VOH | 3.7 | 4.4 | V | VI=VIH, /IOUT/≤4.0mA, VCC=4.5V, TA=25℃ | 4 | |
| High-level output voltage | VOH | 5.2 | 5.8 | V | VI=VIH, /IOUT/≤5.2mA, VCC=6.0V, TA=25℃ | 4 | |
| Low-level output voltage | VOL | 0.1 | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=2.0V, TA=25℃ | 4 | ||
| Low-level output voltage | VOL | 0.06 | 0.4 | V | VI=VIH, /IOUT/≤4.0mA, VCC=4.5V, TA=25℃ | 4 | |
| Low-level output voltage | VOL | 0.07 | 0.4 | V | VI=VIH, /IOUT/≤5.2mA, VCC=6.0V, TA=25℃ | 4 | |
| Input current | IIN | 1 | uA | VI=VCC or GND, VCC=6.0V, TA=25℃ | 4 | ||
| Operating current (quiescent supply current) | ICC | 5.5 | uA | VI=VCC or GND, IOUT=0μA, VCC=6.0V, TA=25℃ | 4 | ||
| Propagation delay time, A/B to Y (high-to-low) | tPHL | 16 | ns | Ta=25℃, VCC=5.0V, tr=tf≤20ns, CL=15pF | 5 | ||
| Propagation delay time, A/B to Y (low-to-high) | tPLH | 18 | ns | Ta=25℃, VCC=5.0V, tr=tf≤20ns, CL=15pF | 5 | ||
| Operating voltage | VCC | 2 | 5 | 6 | V | 4 | |
| Input/output voltage | VIN、Vout | 0 | V | Upper limit printed as VCC | 4 | ||
| Input rise/fall time | Tr tf | 0 | 1000 | ns | VCC=2.0V | 4 | |
| Input rise/fall time | Tr tf | 0 | 500 | ns | VCC=4.5V | 4 | |
| Input rise/fall time | Tr tf | 0 | 400 | ns | VCC=6.0V | 4 | |
| Operating temperature | TA | -40 | 85 | ℃ | 4 | ||
| Supply voltage | VCC | 6.5 | V | 3 | |||
| Input/output voltage | VIN、VOUT | -0.3 | V | Upper limit printed as VCC+0.3V | 3 | ||
| Output current, single pin | IOUT | 25 | mA | 3 | |||
| VCC or GND current | ICC | 50 | mA | 3 | |||
| Power dissipation | PD | 500 | mW | 3 | |||
| Operating temperature | TA | -40 | 85 | ℃ | 3 | ||
| Storage temperature | TS | -65 | 150 | ℃ | 3 | ||
| Lead soldering temperature | TW | 245 | ℃ | 10 s | 3 |
CAD (KiCad official)
- Symbol:
74HC08DM - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc08dm-etched.step/74hc08dm-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc08dm.step/74hc08dm.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (9 pp, sha256
7030fd5fd25d7ce9, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74HC08DM
**HGSEMI** · Logic Gates · SOP-14
74HC08DM from HGSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A1 | input | Input A of gate 1 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 2 | B1 | input | Input B of gate 1 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 3 | Y1 | output | Push-pull buffered output of gate 1; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 4 | A2 | input | Input A of gate 2 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 5 | B2 | input | Input B of gate 2 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 6 | Y2 | output | Push-pull buffered output of gate 2; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 7 | GND | power_in | Ground reference for the device; combined VCC or GND current is limited to 50 mA absolute maximum. |
| 8 | Y3 | output | Push-pull buffered output of gate 3; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 9 | A3 | input | Input A of gate 3 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 10 | B3 | input | Input B of gate 3 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 11 | Y4 | output | Push-pull buffered output of gate 4; absolute maximum output current is 25 mA per pin and output voltage must stay between -0.3 V and VCC+0.3 V. |
| 12 | A4 | input | Input A of gate 4 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 13 | B4 | input | Input B of gate 4 (2-input AND); inputs must stay between -0.3 V and VCC+0.3 V, with input current up to 1 µA at VCC = 6 V. |
| 14 | VCC | power_in | Positive supply; operating range is 2.0 V to 6.0 V, with an absolute maximum of 6.5 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-level input voltage | VIH | 1.5 | | | V | VCC=2.0V, TA=25℃ | 4 |
| High-level input voltage | VIH | 3.15 | | | V | VCC=4.5V, TA=25℃ | 4 |
| High-level input voltage | VIH | 4.2 | | | V | VCC=6.0V, TA=25℃ | 4 |
| Low-level input voltage | VIL | | | 0.5 | V | VCC=2.0V, TA=25℃ | 4 |
| Low-level input voltage | VIL | | | 1.35 | V | VCC=4.5V, TA=25℃ | 4 |
| Low-level input voltage | VIL | | | 1.8 | V | VCC=6.0V, TA=25℃ | 4 |
| High-level output voltage | VOH | 1.9 | | | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=2.0V, TA=25℃ | 4 |
| High-level output voltage | VOH | 4.4 | | | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=4.5V, TA=25℃ | 4 |
| High-level output voltage | VOH | 5.9 | | | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=6.0V, TA=25℃ | 4 |
| High-level output voltage | VOH | 3.7 | 4.4 | | V | VI=VIH, /IOUT/≤4.0mA, VCC=4.5V, TA=25℃ | 4 |
| High-level output voltage | VOH | 5.2 | 5.8 | | V | VI=VIH, /IOUT/≤5.2mA, VCC=6.0V, TA=25℃ | 4 |
| Low-level output voltage | VOL | | | 0.1 | V | VI=VIH or VIL, /IOUT/≤20μA, VCC=2.0V, TA=25℃ | 4 |
| Low-level output voltage | VOL | | 0.06 | 0.4 | V | VI=VIH, /IOUT/≤4.0mA, VCC=4.5V, TA=25℃ | 4 |
| Low-level output voltage | VOL | | 0.07 | 0.4 | V | VI=VIH, /IOUT/≤5.2mA, VCC=6.0V, TA=25℃ | 4 |
| Input current | IIN | | | 1 | uA | VI=VCC or GND, VCC=6.0V, TA=25℃ | 4 |
| Operating current (quiescent supply current) | ICC | | | 5.5 | uA | VI=VCC or GND, IOUT=0μA, VCC=6.0V, TA=25℃ | 4 |
| Propagation delay time, A/B to Y (high-to-low) | tPHL | | | 16 | ns | Ta=25℃, VCC=5.0V, tr=tf≤20ns, CL=15pF | 5 |
| Propagation delay time, A/B to Y (low-to-high) | tPLH | | | 18 | ns | Ta=25℃, VCC=5.0V, tr=tf≤20ns, CL=15pF | 5 |
| Operating voltage | VCC | 2 | 5 | 6 | V | | 4 |
| Input/output voltage | VIN、Vout | 0 | | | V | Upper limit printed as VCC | 4 |
| Input rise/fall time | Tr tf | 0 | | 1000 | ns | VCC=2.0V | 4 |
| Input rise/fall time | Tr tf | 0 | | 500 | ns | VCC=4.5V | 4 |
| Input rise/fall time | Tr tf | 0 | | 400 | ns | VCC=6.0V | 4 |
| Operating temperature | TA | -40 | | 85 | ℃ | | 4 |
| Supply voltage | VCC | | | 6.5 | V | | 3 |
| Input/output voltage | VIN、VOUT | -0.3 | | | V | Upper limit printed as VCC+0.3V | 3 |
| Output current, single pin | IOUT | | | 25 | mA | | 3 |
| VCC or GND current | ICC | | | 50 | mA | | 3 |
| Power dissipation | PD | | | 500 | mW | | 3 |
| Operating temperature | TA | -40 | | 85 | ℃ | | 3 |
| Storage temperature | TS | -65 | | 150 | ℃ | | 3 |
| Lead soldering temperature | TW | | | 245 | ℃ | 10 s | 3 |
## CAD (KiCad official)
- Symbol: `74HC08DM`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `74hc08dm-etched.step` / `74hc08dm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74hc08dm.step` / `74hc08dm.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602944221917687808) (9 pp, sha256 `7030fd5fd25d7ce9`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74hc08dm-datasheet.pdf)