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Initial commit: component/74hc02m

Ray ·322f82bbf2 ·2mo ago
2 files changed +92
README.mdadded+58
@@ -0,0 +1,58 @@+# 74HC02M++**HGSEMI** · Gates · SOIC-14++74HC02M from HGSEMI, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Y1 | output | Gate 1 NOR output. Y1 = NOT(A1 + B1). CMOS output capable of driving 10 LSTTL loads; VOH >= VCC-0.1 V and VOL <= 0.1 V at |Iout| <= 20 uA. |+| 2 | A1 | input | Gate 1 NOR input A. High-impedance CMOS input; VIH >= 0.7*VCC and VIL <= 0.3*VCC (approx). Maximum input leakage 1.0 uA. Unused inputs must be tied to VCC or GND. |+| 3 | B1 | input | Gate 1 NOR input B. High-impedance CMOS input; must be tied to a valid logic level (unused inputs to VCC or GND). |+| 4 | Y2 | output | Gate 2 NOR output. Y2 = NOT(A2 + B2). CMOS push-pull output; drives 10 LSTTL loads. |+| 5 | A2 | input | Gate 2 NOR input A. High-impedance CMOS input. |+| 6 | B2 | input | Gate 2 NOR input B. High-impedance CMOS input. |+| 7 | GND | power_in | Device ground / 0 V reference. All inputs and outputs are referenced to GND. |+| 8 | A3 | input | Gate 3 NOR input A. High-impedance CMOS input. |+| 9 | B3 | input | Gate 3 NOR input B. High-impedance CMOS input. |+| 10 | Y3 | output | Gate 3 NOR output. Y3 = NOT(A3 + B3). CMOS push-pull output. |+| 11 | A4 | input | Gate 4 NOR input A. High-impedance CMOS input. |+| 12 | B4 | input | Gate 4 NOR input B. High-impedance CMOS input. |+| 13 | Y4 | output | Gate 4 NOR output. Y4 = NOT(A4 + B4). CMOS push-pull output. |+| 14 | VCC | power_in | Positive supply. Operating range 2.0 V to 6.0 V (absolute maximum 7.0 V). Bypass locally to GND with a 0.1 uF ceramic capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HGSEMI |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `74HC02MM/TR`+- `74HC02MN`+- `74HC02MMT/TR`+- `74HC02MLQ/TR`++## CAD (KiCad official)++- Symbol: `74HC02M`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HGSEMI datasheet](docs/74hc02m-datasheet.pdf) (9 pp, sha256 `868940124e153af6`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74hc02m-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "74hc02m",+  "version": "0.1.0",+  "type": "component",+  "description": "HGSEMI Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "74hc02m"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "74hc02m.kicad_sym",+    "74hc02m.kicad_mod",+    "74hc02m.glb",+    "74hc02m.step",+    "74hc02m.lbr",+    "docs/hero.png",+    "docs/74hc02m-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file