component
74HC00DRG
Public Made by Adomby adom
HANSCHIP semiconductor Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74HC00DRG
HANSCHIP semiconductor · Gates · SOP-14
74HC00DRG from HANSCHIP semiconductor, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of gate 1 (two-input NAND). |
| 2 | 1B | input | Data input B of gate 1 (two-input NAND). |
| 3 | 1Y | output | Data output of gate 1, low only when both 1A and 1B are high. |
| 4 | 2A | input | Data input A of gate 2 (two-input NAND). |
| 5 | 2B | input | Data input B of gate 2 (two-input NAND). |
| 6 | 2Y | output | Data output of gate 2, low only when both 2A and 2B are high. |
| 7 | GND | power_in | System ground (0 V). |
| 8 | 3Y | output | Data output of gate 3, low only when both 3A and 3B are high. |
| 9 | 3A | input | Data input A of gate 3 (two-input NAND). |
| 10 | 3B | input | Data input B of gate 3 (two-input NAND). |
| 11 | 4Y | output | Data output of gate 4, low only when both 4A and 4B are high. |
| 12 | 4A | input | Data input A of gate 4 (two-input NAND). |
| 13 | 4B | input | Data input B of gate 4 (two-input NAND). |
| 14 | VCC | power_in | Positive supply, recommended 2.0 V to 6.0 V (absolute maximum 7.0 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-14 |
| Category | Logic ICs |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | GND=0V | 4 | |
| Input clamping diode current | Ilk | 20 | mA | Vi<-0.5V or Vi>VCC+0.5V; printed ±20 | 4 | ||
| Output clamping diode current | Iok | 20 | mA | Vo<-0.5V or Vo>VCC+0.5V; printed ±20 | 4 | ||
| Output current | Io | 25 | mA | -0.5V<Vo<VCC+0.5V; printed ±25 | 4 | ||
| Supply/ground current | Icc, IGND | 50 | mA | printed ±50 | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Power dissipation | PD | 500 | mW | Tamb=-40~125°C | 4 | ||
| Soldering temperature SOP | TL | 245 | °C | 10 seconds, SOP | 4 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 4 | |
| Ambient temperature | Tamb | -40 | 25 | 85 | °C | 4 | |
| Input rise and fall time | tr,tf | 1000 | ns | VCC=2.0V | 4 | ||
| Input rise and fall time | tr,tf | 6 | 500 | ns | VCC=4.5V | 4 | |
| Input rise and fall time | tr,tf | 400 | ns | VCC=6.0V | 4 | ||
| High-level input voltage | VIH | 1.5 | 1.2 | V | VCC=2.0V; Tamb=-40~85°C | 5 | |
| High-level input voltage | VIH | 3.15 | 2.4 | V | VCC=4.5V; Tamb=-40~85°C | 5 | |
| High-level input voltage | VIH | 4.2 | 3.2 | V | VCC=6.0V; Tamb=-40~85°C | 5 | |
| Low-level input voltage | VIL | 0.8 | 0.5 | V | VCC=2.0V; Tamb=-40~85°C | 5 | |
| Low-level input voltage | VIL | 2.1 | 1.35 | V | VCC=4.5V; Tamb=-40~85°C | 5 | |
| Low-level input voltage | VIL | 2.8 | 1.8 | V | VCC=6.0V; Tamb=-40~85°C | 5 | |
| High-level output voltage | VOH | 1.9 | 2 | V | Vi=VIH or VIL; VCC=2.0V IO=-20uA; Tamb=-40~85°C | 5 | |
| High-level output voltage | VOH | 4.4 | 4.5 | V | Vi=VIH or VIL; VCC=4.5V IO=-20uA; Tamb=-40~85°C | 5 | |
| High-level output voltage | VOH | 5.9 | 6 | V | Vi=VIH or VIL; VCC=6.0V IO=-20uA; Tamb=-40~85°C | 5 | |
| High-level output voltage | VOH | 3.84 | 4.32 | V | Vi=VIH or VIL; VCC=4.5V IO=-4.0mA; Tamb=-40~85°C | 5 | |
| High-level output voltage | VOH | 5.34 | 5.81 | V | Vi=VIH or VIL; VCC=6.0V IO=-5.2mA; Tamb=-40~85°C | 5 | |
| Low-level output voltage | VOL | 0 | 0.1 | V | Vi=VIH or VIL; VCC=2.0V IO=20uA; Tamb=-40~85°C | 5 | |
| Low-level output voltage | VOL | 0.15 | 0.33 | V | Vi=VIH or VIL; VCC=4.5V IO=4.0mA; Tamb=-40~85°C | 5 | |
| Low-level output voltage | VOL | 0.16 | 0.33 | V | Vi=VIH or VIL; VCC=6.0V IO=5.2mA; Tamb=-40~85°C | 5 | |
| Input leakage current | ILI | -1 | 1 | uA | VCC=6.0V, Vi=VCC or GND; Tamb=-40~85°C | 5 | |
| Quiescent supply current | ICCQ | 20 | uA | VCC=6.0V, Vi=VCC or GND, IO=0; Tamb=-40~85°C | 5 | ||
| Propagation delay nA,nB to nY | tPHL/tPLH | 25 | 115 | ns | VCC=2.0V; Tamb=-40~85°C; CL=50pF | 7 | |
| Propagation delay nA,nB to nY | tPHL/tPLH | 9 | 23 | ns | VCC=4.5V; Tamb=-40~85°C; CL=50pF | 7 | |
| Propagation delay nA,nB to nY | tPHL/tPLH | 7 | 20 | ns | VCC=6.0V; Tamb=-40~85°C; CL=50pF | 7 | |
| Output transition time | tTHL/tTLH | 19 | 95 | ns | VCC=2.0V; Tamb=-40~85°C; CL=50pF | 7 | |
| Output transition time | tTHL/tTLH | 7 | 19 | ns | VCC=4.5V; Tamb=-40~85°C; CL=50pF | 7 | |
| Output transition time | tTHL/tTLH | 6 | 16 | ns | VCC=6.0V; Tamb=-40~85°C; CL=50pF | 7 | |
| High-level output voltage | VOH | 1.9 | V | Vi=VIH or VIL; VCC=2.0V IO=-20uA; Tamb=-40~125°C | 6 | ||
| High-level output voltage | VOH | 4.4 | V | Vi=VIH or VIL; VCC=4.5V IO=-20uA; Tamb=-40~125°C | 6 | ||
| High-level output voltage | VOH | 5.9 | V | Vi=VIH or VIL; VCC=6.0V IO=-20uA; Tamb=-40~125°C | 6 | ||
| High-level output voltage | VOH | 3.7 | V | Vi=VIH or VIL; VCC=4.5V IO=-4.0mA; Tamb=-40~125°C | 6 | ||
| High-level output voltage | VOH | 5.2 | V | Vi=VIH or VIL; VCC=6.0V IO=-5.2mA; Tamb=-40~125°C | 6 | ||
| Low-level output voltage | VOL | 0.1 | V | Vi=VIH or VIL; VCC=2.0V IO=20uA; Tamb=-40~125°C | 6 | ||
| Low-level output voltage | VOL | 0.4 | V | Vi=VIH or VIL; VCC=4.5V IO=4.0mA; Tamb=-40~125°C | 6 | ||
| Input leakage current | ILI | -1 | 1 | uA | VCC=6.0V, Vi=VCC or GND; Tamb=-40~125°C | 6 | |
| Quiescent supply current | ICCQ | 40 | uA | VCC=6.0V, Vi=VCC or GND, IO=0; Tamb=-40~125°C | 6 | ||
| Propagation delay nA,nB to nY | tPHL/tPLH | 135 | ns | VCC=2.0V; Tamb=-40~125°C; CL=50pF | 7 | ||
| Propagation delay nA,nB to nY | tPHL/tPLH | 27 | ns | VCC=4.5V; Tamb=-40~125°C; CL=50pF | 7 | ||
| Propagation delay nA,nB to nY | tPHL/tPLH | 23 | ns | VCC=6.0V; Tamb=-40~125°C; CL=50pF | 7 | ||
| Output transition time | tTHL/tTLH | 110 | ns | VCC=2.0V; Tamb=-40~125°C; CL=50pF | 7 | ||
| Output transition time | tTHL/tTLH | 22 | ns | VCC=4.5V; Tamb=-40~125°C; CL=50pF | 7 | ||
| Output transition time | tTHL/tTLH | 19 | ns | VCC=6.0V; Tamb=-40~125°C; CL=50pF | 7 |
CAD (KiCad official)
- Symbol:
74HC00DRG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
74hc00drg-etched.step/74hc00drg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74hc00drg.step/74hc00drg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (12 pp, sha256
669a9f448b8c3612, retrieved 2026-10-22, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).