component

74HC00D-JSM

Public Made by Adom

by adom

JSMSEMI Logic Gates, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic74hc00d-jsmfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers 74hc00d-jsm: viewers · Ray 5d ago
74hc00d-jsm-etched.glb Publish 0.1.0 · Ray 5d ago
74hc00d-jsm-etched.step 74hc00d-jsm: factory component page (tier=lcsc) · Ray 5d ago
74hc00d-jsm-hero.glb 74hc00d-jsm: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
74hc00d-jsm-hero.overlay.json Publish 0.1.0 · Ray 5d ago
74hc00d-jsm.glb Publish 0.1.0 · Ray 5d ago
74hc00d-jsm.kicad_mod Publish 0.1.0 · Ray 5d ago
74hc00d-jsm.kicad_sym Publish 0.1.0 · Ray 5d ago
74hc00d-jsm.lbr Publish 0.1.0 · Ray 5d ago
74hc00d-jsm.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago

74HC00D-JSM

JSMSEMI · Logic Gates · SOP-14

74HC00D-JSM from JSMSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input Gate 1 input A.
2 B1 input Gate 1 input B.
3 Y1 output Gate 1 NAND output (Y = NOT(A·B)).
4 A2 input Gate 2 input A.
5 B2 input Gate 2 input B.
6 Y2 output Gate 2 NAND output (Y = NOT(A·B)).
7 GND power_in Ground.
8 Y3 output Gate 3 NAND output (Y = NOT(A·B)).
9 A3 input Gate 3 input A.
10 B3 input Gate 3 input B.
11 Y4 output Gate 4 NAND output (Y = NOT(A·B)).
12 A4 input Gate 4 input A.
13 B4 input Gate 4 input B.
14 VCC power_in Supply voltage, operating range 2.0 V to 6.0 V (absolute maximum 6.5 V).

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: 74HC00D-JSM
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74hc00d-jsm-etched.step / 74hc00d-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74hc00d-jsm.step / 74hc00d-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (5 pp, sha256 1078cf83a9ee971c, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF