component
74FCT3807SQGI
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, QSOP-20-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74FCT3807SQGI
RENESAS · Clock Buffers, Drivers · QSOP-20-150mil
74FCT3807SQGI from RENESAS, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ICLK | input | Clock input to the low-skew buffer. |
| 2 | GND | power_in | Connect to ground. |
| 3 | Q0 | output | Clock output 0. |
| 4 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
| 5 | Q1 | output | Clock output 1. |
| 6 | GND | power_in | Connect to ground. |
| 7 | Q2 | output | Clock output 2. |
| 8 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
| 9 | Q3 | output | Clock output 3. |
| 10 | GND | power_in | Connect to ground. |
| 11 | Q4 | output | Clock output 4. |
| 12 | Q5 | output | Clock output 5. |
| 13 | GND | power_in | Connect to ground. |
| 14 | Q6 | output | Clock output 6. |
| 15 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
| 16 | Q7 | output | Clock output 7. |
| 17 | GND | power_in | Connect to ground. |
| 18 | Q8 | output | Clock output 8. |
| 19 | Q9 | output | Clock output 9. |
| 20 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | QSOP-20-150mil |
| Category | Clock and Timing |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 1.71 | 1.89 | V | VDD=1.8V ±5% | 4 | |
| Operating Voltage | VDD | 2.375 | 2.625 | V | VDD=2.5V ±5% | 4 | |
| Operating Voltage | VDD | 3.15 | 3.45 | V | VDD=3.3V ±5% | 4 | |
| Output High Voltage | VOH | 1.3 | V | VDD=1.8V ±5%; IOH = -10 mA | 4 | ||
| Output High Voltage | VOH | 1.8 | V | VDD=2.5V ±5%; IOH = -16 mA | 4 | ||
| Output High Voltage | VOH | 2.2 | V | VDD=3.3V ±5%; IOH = -25 mA | 4 | ||
| Output Low Voltage | VOL | 0.35 | V | VDD=1.8V ±5%; IOL = 10 mA | 4 | ||
| Output Low Voltage | VOL | 0.5 | V | VDD=2.5V ±5%; IOL = 16 mA | 4 | ||
| Output Low Voltage | VOL | 0.7 | V | VDD=3.3V ±5%; IOL = 25 mA | 4 | ||
| Operating Supply Current | IDD | 35 | mA | VDD=1.8V ±5%; No load, 135 MHz | 4 | ||
| Operating Supply Current | IDD | 45 | mA | VDD=2.5V ±5%; No load, 135 MHz | 4 | ||
| Operating Supply Current | IDD | 55 | mA | VDD=3.3V ±5%; No load, 135 MHz | 4 | ||
| Input Frequency | 0 | 200 | MHz | VDD=1.8V ±5% | 5 | ||
| Output Rise Time | tOR | 1.4 | 1.9 | ns | VDD=1.8V ±5%; 0.36 to 1.44 V, CL=5 pF | 5 | |
| Output Rise Time | tOR | 1 | 1.5 | ns | VDD=2.5V ±5%; 0.5 to 2.0 V, CL=5 pF | 5 | |
| Output Rise Time | tOR | 0.6 | 1 | ns | VDD=3.3V ±5%; 0.66 to 2.64 V, CL=5 pF | 5 | |
| Output Fall Time | tOF | 1.4 | 1.9 | ns | VDD=1.8V ±5%; 1.44 to 0.36 V, CL=5 pF | 5 | |
| Output Fall Time | tOF | 1 | 1.5 | ns | VDD=2.5V ±5%; 2.0 to 0.5 V, CL=5 pF | 5 | |
| Output Fall Time | tOF | 0.6 | 1 | ns | VDD=3.3V ±5%; 2.64 to 0.66 V, CL=5 pF | 5 | |
| Propagation Delay | 1.5 | 2.5 | 4 | ns | VDD=1.8V ±5%; Note 1 (rail to rail input clock) | 5 | |
| Propagation Delay | 1.8 | 2.5 | 4.5 | ns | VDD=2.5V ±5%; Note 1 (rail to rail input clock) | 5 | |
| Buffer Additive Phase Jitter, RMS | 0.05 | ps | VDD=1.8V ±5%; 125MHz, Integration Range: 12kHz-20MHz | 5 | |||
| Output to Output Skew | 50 | 65 | ps | VDD=1.8V ±5%; Rising edges at VDD/2; Note 2 (between any 2 outputs with equal loading) | 5 | ||
| Device to Device Skew | 200 | ps | VDD=1.8V ±5%; Rising edges at VDD/2 | 5 | |||
| Start-up Time | tSTART-UP | 2 | ms | VDD=1.8V ±5%; Part start-up time for valid outputs after VDD ramp-up | 5 | ||
| Ambient Operating Temperature (extended) | -40 | 105 | C | 3 | |||
| Power Supply Voltage (measured in respect to GND) | VDD | 1.71 | 3.465 | V | 3 | ||
| Supply Voltage | VDD | 3.465 | V | 3 | |||
| ICLK input voltage | ICLK | 3.465 | V | 3 | |||
| Ambient Operating Temperature (extended) | -40 | 105 | °C | 3 | |||
| Storage Temperature | -65 | 150 | °C | 3 | |||
| Junction Temperature | 125 | °C | 3 | ||||
| Soldering Temperature | 260 | °C | 3 | ||||
| Nominal Output Impedance | ZO | 17 | VDD=1.8V ±5% | 4 | |||
| Input Capacitance | CIN | 5 | pF | VDD=1.8V ±5%; ICLK | 4 |
CAD (KiCad official)
- Symbol:
74FCT3807SQGI - Footprint:
Package_SO:QSOP-20_3.9x8.7mm_P0.635mm - 3D model: QSOP-20-150mil (KiCad packages3D, STEP)
- 3D model files:
74fct3807sqgi-etched.step/74fct3807sqgi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74fct3807sqgi.step/74fct3807sqgi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (19 pp, sha256
31a0c26cc08b8d71, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74FCT3807SQGI
**RENESAS** · Clock Buffers, Drivers · QSOP-20-150mil
74FCT3807SQGI from RENESAS, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ICLK | input | Clock input to the low-skew buffer. |
| 2 | GND | power_in | Connect to ground. |
| 3 | Q0 | output | Clock output 0. |
| 4 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
| 5 | Q1 | output | Clock output 1. |
| 6 | GND | power_in | Connect to ground. |
| 7 | Q2 | output | Clock output 2. |
| 8 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
| 9 | Q3 | output | Clock output 3. |
| 10 | GND | power_in | Connect to ground. |
| 11 | Q4 | output | Clock output 4. |
| 12 | Q5 | output | Clock output 5. |
| 13 | GND | power_in | Connect to ground. |
| 14 | Q6 | output | Clock output 6. |
| 15 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
| 16 | Q7 | output | Clock output 7. |
| 17 | GND | power_in | Connect to ground. |
| 18 | Q8 | output | Clock output 8. |
| 19 | Q9 | output | Clock output 9. |
| 20 | VDD | power_in | Connect to +1.8V, +2.5 V, or +3.3 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | QSOP-20-150mil |
| Category | Clock and Timing |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 1.71 | | 1.89 | V | VDD=1.8V ±5% | 4 |
| Operating Voltage | VDD | 2.375 | | 2.625 | V | VDD=2.5V ±5% | 4 |
| Operating Voltage | VDD | 3.15 | | 3.45 | V | VDD=3.3V ±5% | 4 |
| Output High Voltage | VOH | 1.3 | | | V | VDD=1.8V ±5%; IOH = -10 mA | 4 |
| Output High Voltage | VOH | 1.8 | | | V | VDD=2.5V ±5%; IOH = -16 mA | 4 |
| Output High Voltage | VOH | 2.2 | | | V | VDD=3.3V ±5%; IOH = -25 mA | 4 |
| Output Low Voltage | VOL | | | 0.35 | V | VDD=1.8V ±5%; IOL = 10 mA | 4 |
| Output Low Voltage | VOL | | | 0.5 | V | VDD=2.5V ±5%; IOL = 16 mA | 4 |
| Output Low Voltage | VOL | | | 0.7 | V | VDD=3.3V ±5%; IOL = 25 mA | 4 |
| Operating Supply Current | IDD | | | 35 | mA | VDD=1.8V ±5%; No load, 135 MHz | 4 |
| Operating Supply Current | IDD | | | 45 | mA | VDD=2.5V ±5%; No load, 135 MHz | 4 |
| Operating Supply Current | IDD | | | 55 | mA | VDD=3.3V ±5%; No load, 135 MHz | 4 |
| Input Frequency | | 0 | | 200 | MHz | VDD=1.8V ±5% | 5 |
| Output Rise Time | tOR | | 1.4 | 1.9 | ns | VDD=1.8V ±5%; 0.36 to 1.44 V, CL=5 pF | 5 |
| Output Rise Time | tOR | | 1 | 1.5 | ns | VDD=2.5V ±5%; 0.5 to 2.0 V, CL=5 pF | 5 |
| Output Rise Time | tOR | | 0.6 | 1 | ns | VDD=3.3V ±5%; 0.66 to 2.64 V, CL=5 pF | 5 |
| Output Fall Time | tOF | | 1.4 | 1.9 | ns | VDD=1.8V ±5%; 1.44 to 0.36 V, CL=5 pF | 5 |
| Output Fall Time | tOF | | 1 | 1.5 | ns | VDD=2.5V ±5%; 2.0 to 0.5 V, CL=5 pF | 5 |
| Output Fall Time | tOF | | 0.6 | 1 | ns | VDD=3.3V ±5%; 2.64 to 0.66 V, CL=5 pF | 5 |
| Propagation Delay | | 1.5 | 2.5 | 4 | ns | VDD=1.8V ±5%; Note 1 (rail to rail input clock) | 5 |
| Propagation Delay | | 1.8 | 2.5 | 4.5 | ns | VDD=2.5V ±5%; Note 1 (rail to rail input clock) | 5 |
| Buffer Additive Phase Jitter, RMS | | | | 0.05 | ps | VDD=1.8V ±5%; 125MHz, Integration Range: 12kHz-20MHz | 5 |
| Output to Output Skew | | | 50 | 65 | ps | VDD=1.8V ±5%; Rising edges at VDD/2; Note 2 (between any 2 outputs with equal loading) | 5 |
| Device to Device Skew | | | | 200 | ps | VDD=1.8V ±5%; Rising edges at VDD/2 | 5 |
| Start-up Time | tSTART-UP | | | 2 | ms | VDD=1.8V ±5%; Part start-up time for valid outputs after VDD ramp-up | 5 |
| Ambient Operating Temperature (extended) | | -40 | | 105 | C | | 3 |
| Power Supply Voltage (measured in respect to GND) | VDD | 1.71 | | 3.465 | V | | 3 |
| Supply Voltage | VDD | | | 3.465 | V | | 3 |
| ICLK input voltage | ICLK | | | 3.465 | V | | 3 |
| Ambient Operating Temperature (extended) | | -40 | | 105 | °C | | 3 |
| Storage Temperature | | -65 | | 150 | °C | | 3 |
| Junction Temperature | | | | 125 | °C | | 3 |
| Soldering Temperature | | | | 260 | °C | | 3 |
| Nominal Output Impedance | ZO | | 17 | | | VDD=1.8V ±5% | 4 |
| Input Capacitance | CIN | | 5 | | pF | VDD=1.8V ±5%; ICLK | 4 |
## CAD (KiCad official)
- Symbol: `74FCT3807SQGI`
- Footprint: `Package_SO:QSOP-20_3.9x8.7mm_P0.635mm`
- 3D model: QSOP-20-150mil (KiCad packages3D, STEP)
- 3D model files: `74fct3807sqgi-etched.step` / `74fct3807sqgi-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74fct3807sqgi.step` / `74fct3807sqgi.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [RENESAS datasheet](docs/74fct3807sqgi-datasheet.pdf) (19 pp, sha256 `31a0c26cc08b8d71`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74fct3807sqgi-datasheet.pdf)