component
74CBTLV3257PW-Q10J
Public Made by Adomby adom
Nexperia Logic ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74CBTLV3257PW-Q10J
Nexperia · Logic ICs · TSSOP-16
74CBTLV3257PW-Q10J from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Select input that connects nA to nB1 when LOW and to nB2 when HIGH, and only takes effect while OE is LOW. |
| 2 | 1B1 | bidirectional | B1 input/output of switch 1; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 3 | 1B2 | bidirectional | B2 input/output of switch 1; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 4 | 1A | bidirectional | A input/output of switch 1; it is connected to 1B1 or 1B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 5 | 2B1 | bidirectional | B1 input/output of switch 2; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 6 | 2B2 | bidirectional | B2 input/output of switch 2; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 7 | 2A | bidirectional | A input/output of switch 2; it is connected to 2B1 or 2B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 8 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 9 | 3A | bidirectional | A input/output of switch 3; it is connected to 3B1 or 3B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 10 | 3B2 | bidirectional | B2 input/output of switch 3; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 11 | 3B1 | bidirectional | B1 input/output of switch 3; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 12 | 4A | bidirectional | A input/output of switch 4; it is connected to 4B1 or 4B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 13 | 4B2 | bidirectional | B2 input/output of switch 4; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 14 | 4B1 | bidirectional | B1 input/output of switch 4; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 15 | OE | input | Active-LOW output enable; when HIGH all switches are in the high-impedance OFF-state, and it should be tied to VCC through a pull-up resistor to keep the OFF-state during power-up or power-down. |
| 16 | VCC | power_in | Supply voltage, specified from 2.3 V to 3.6 V (absolute maximum -0.5 V to +4.6 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | -0.5 | 4.6 | V | 4 | ||
| Input voltage, control inputs | VI | -0.5 | 4.6 | V | control inputs | 4 | |
| Switch voltage, enable and disable mode | VSW | -0.5 | V | enable and disable mode | 4 | ||
| Input clamping current | IIK | -50 | mA | VI < -0.5 V | 4 | ||
| Switch clamping current | ISK | -50 | mA | VI < -0.5 V | 4 | ||
| Switch current | ISW | -128 | 128 | mA | VSW = 0 V to VCC | 4 | |
| Supply current (absolute maximum) | ICC | 100 | mA | 4 | |||
| Ground current | IGND | -100 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C; SOT403-1 (TSSOP16) | 4 | ||
| Supply voltage (recommended) | VCC | 2.3 | 3.6 | V | 4 | ||
| Input voltage (recommended) | VI | 0 | 3.6 | V | 4 | ||
| Switch voltage (recommended) | VSW | 0 | V | enable and disable mode | 4 | ||
| Ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 0 | 200 | ns/V | VCC = 2.3 V to 3.6 V | 4 | |
| HIGH-level input voltage | VIH | 1.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 | ||
| LOW-level input voltage | VIL | 0.9 | V | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V | 5 | ||
| Input leakage current | II | -20 | 20 | μA | Tamb = -40 °C to +125 °C; pin OE, S; VCC = 3.6 V; VI = GND to VCC | 5 | |
| OFF-state leakage current | IS(OFF) | -20 | 20 | μA | Tamb = -40 °C to +125 °C; VCC = 3.6 V; see Fig. 2 | 5 | |
| ON-state leakage current | IS(ON) | -20 | 20 | μA | Tamb = -40 °C to +125 °C; VCC = 3.6 V; see Fig. 3 | 5 | |
| Power-off leakage current | IOFF | -50 | 50 | μA | Tamb = -40 °C to +125 °C; VI or VO = 0 V to 3.6 V; VCC = 0 V | 5 | |
| Supply current | ICC | 50 | μA | Tamb = -40 °C to +125 °C; VI = GND or VCC; VSW = GND or VCC; VCC = 3.6 V; IO = 0 A | 5 | ||
| Additional supply current | ΔICC | 2000 | μA | Tamb = -40 °C to +125 °C; pin OE, S; VCC = 3.6 V; VI = VCC - 0.6 V; VSW = GND or VCC | 5 | ||
| ON resistance | RON | 4.2 | 15 | Ω | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V | 6 | |
| ON resistance | RON | 8.4 | 60 | Ω | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V | 6 | |
| ON resistance | RON | 4 | 11 | Ω | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V | 6 | |
| ON resistance | RON | 6.2 | 25.5 | Ω | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V | 6 | |
| Propagation delay nA to nBn or nBn to nA | tpd | 0.25 | ns | Tamb = -40 °C to +125 °C; nA to nBn or nBn to nA; see Fig. 11; VCC = 2.3 V to 2.7 V | 8 | ||
| Propagation delay S to nA | tpd | 1 | 3.8 | 6.7 | ns | Tamb = -40 °C to +125 °C; S to nA; see Fig. 11; VCC = 2.3 V to 2.7 V | 8 |
| Propagation delay S to nA | tpd | 1 | 3.2 | 5.8 | ns | Tamb = -40 °C to +125 °C; S to nA; see Fig. 11; VCC = 3.0 V to 3.6 V | 8 |
| Enable time OE to nA or nBn | ten | 1 | 2.2 | 6.2 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 8 |
| Enable time OE to nA or nBn | ten | 1 | 2 | 5.5 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 8 |
| Enable time S to nBn | ten | 1 | 3.5 | 6.7 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 8 |
| Enable time S to nBn | ten | 1 | 3 | 5.8 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 8 |
| Disable time OE to nA or nBn | tdis | 1 | 2.6 | 6.1 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 9 |
| Disable time OE to nA or nBn | tdis | 1 | 3.1 | 6.1 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 9 |
| Disable time S to nBn | tdis | 1 | 2.6 | 5.3 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 9 |
| Disable time S to nBn | tdis | 1 | 3.2 | 5 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 9 |
CAD (KiCad official)
- Symbol:
74CBTLV3257PW-Q10J - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
74cbtlv3257pw-q10j-etched.step/74cbtlv3257pw-q10j-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74cbtlv3257pw-q10j.step/74cbtlv3257pw-q10j.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
a1b7b4b84f0b014f, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74CBTLV3257PW-Q10J
**Nexperia** · Logic ICs · TSSOP-16
74CBTLV3257PW-Q10J from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Select input that connects nA to nB1 when LOW and to nB2 when HIGH, and only takes effect while OE is LOW. |
| 2 | 1B1 | bidirectional | B1 input/output of switch 1; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 3 | 1B2 | bidirectional | B2 input/output of switch 1; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 4 | 1A | bidirectional | A input/output of switch 1; it is connected to 1B1 or 1B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 5 | 2B1 | bidirectional | B1 input/output of switch 2; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 6 | 2B2 | bidirectional | B2 input/output of switch 2; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 7 | 2A | bidirectional | A input/output of switch 2; it is connected to 2B1 or 2B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 8 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 9 | 3A | bidirectional | A input/output of switch 3; it is connected to 3B1 or 3B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 10 | 3B2 | bidirectional | B2 input/output of switch 3; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 11 | 3B1 | bidirectional | B1 input/output of switch 3; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 12 | 4A | bidirectional | A input/output of switch 4; it is connected to 4B1 or 4B2 depending on S when OE is LOW, and is high-impedance when OE is HIGH. |
| 13 | 4B2 | bidirectional | B2 input/output of switch 4; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 14 | 4B1 | bidirectional | B1 input/output of switch 4; the switch voltage must stay between 0 V and VCC in enable and disable mode. |
| 15 | OE | input | Active-LOW output enable; when HIGH all switches are in the high-impedance OFF-state, and it should be tied to VCC through a pull-up resistor to keep the OFF-state during power-up or power-down. |
| 16 | VCC | power_in | Supply voltage, specified from 2.3 V to 3.6 V (absolute maximum -0.5 V to +4.6 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute maximum) | VCC | -0.5 | | 4.6 | V | | 4 |
| Input voltage, control inputs | VI | -0.5 | | 4.6 | V | control inputs | 4 |
| Switch voltage, enable and disable mode | VSW | -0.5 | | | V | enable and disable mode | 4 |
| Input clamping current | IIK | -50 | | | mA | VI < -0.5 V | 4 |
| Switch clamping current | ISK | -50 | | | mA | VI < -0.5 V | 4 |
| Switch current | ISW | -128 | | 128 | mA | VSW = 0 V to VCC | 4 |
| Supply current (absolute maximum) | ICC | | | 100 | mA | | 4 |
| Ground current | IGND | -100 | | | mA | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Total power dissipation | Ptot | | | 500 | mW | Tamb = -40 °C to +125 °C; SOT403-1 (TSSOP16) | 4 |
| Supply voltage (recommended) | VCC | 2.3 | | 3.6 | V | | 4 |
| Input voltage (recommended) | VI | 0 | | 3.6 | V | | 4 |
| Switch voltage (recommended) | VSW | 0 | | | V | enable and disable mode | 4 |
| Ambient temperature | Tamb | -40 | | 125 | °C | | 4 |
| Input transition rise and fall rate | Δt/ΔV | 0 | | 200 | ns/V | VCC = 2.3 V to 3.6 V | 4 |
| HIGH-level input voltage | VIH | 1.7 | | | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 |
| HIGH-level input voltage | VIH | 2 | | | V | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V | 5 |
| LOW-level input voltage | VIL | | | 0.7 | V | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V | 5 |
| LOW-level input voltage | VIL | | | 0.9 | V | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V | 5 |
| Input leakage current | II | -20 | | 20 | μA | Tamb = -40 °C to +125 °C; pin OE, S; VCC = 3.6 V; VI = GND to VCC | 5 |
| OFF-state leakage current | IS(OFF) | -20 | | 20 | μA | Tamb = -40 °C to +125 °C; VCC = 3.6 V; see Fig. 2 | 5 |
| ON-state leakage current | IS(ON) | -20 | | 20 | μA | Tamb = -40 °C to +125 °C; VCC = 3.6 V; see Fig. 3 | 5 |
| Power-off leakage current | IOFF | -50 | | 50 | μA | Tamb = -40 °C to +125 °C; VI or VO = 0 V to 3.6 V; VCC = 0 V | 5 |
| Supply current | ICC | | | 50 | μA | Tamb = -40 °C to +125 °C; VI = GND or VCC; VSW = GND or VCC; VCC = 3.6 V; IO = 0 A | 5 |
| Additional supply current | ΔICC | | | 2000 | μA | Tamb = -40 °C to +125 °C; pin OE, S; VCC = 3.6 V; VI = VCC - 0.6 V; VSW = GND or VCC | 5 |
| ON resistance | RON | | 4.2 | 15 | Ω | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V | 6 |
| ON resistance | RON | | 8.4 | 60 | Ω | Tamb = -40 °C to +125 °C; VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V | 6 |
| ON resistance | RON | | 4 | 11 | Ω | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V | 6 |
| ON resistance | RON | | 6.2 | 25.5 | Ω | Tamb = -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V | 6 |
| Propagation delay nA to nBn or nBn to nA | tpd | | | 0.25 | ns | Tamb = -40 °C to +125 °C; nA to nBn or nBn to nA; see Fig. 11; VCC = 2.3 V to 2.7 V | 8 |
| Propagation delay S to nA | tpd | 1 | 3.8 | 6.7 | ns | Tamb = -40 °C to +125 °C; S to nA; see Fig. 11; VCC = 2.3 V to 2.7 V | 8 |
| Propagation delay S to nA | tpd | 1 | 3.2 | 5.8 | ns | Tamb = -40 °C to +125 °C; S to nA; see Fig. 11; VCC = 3.0 V to 3.6 V | 8 |
| Enable time OE to nA or nBn | ten | 1 | 2.2 | 6.2 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 8 |
| Enable time OE to nA or nBn | ten | 1 | 2 | 5.5 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 8 |
| Enable time S to nBn | ten | 1 | 3.5 | 6.7 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 8 |
| Enable time S to nBn | ten | 1 | 3 | 5.8 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 8 |
| Disable time OE to nA or nBn | tdis | 1 | 2.6 | 6.1 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 9 |
| Disable time OE to nA or nBn | tdis | 1 | 3.1 | 6.1 | ns | Tamb = -40 °C to +125 °C; OE to nA or nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 9 |
| Disable time S to nBn | tdis | 1 | 2.6 | 5.3 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 2.3 V to 2.7 V | 9 |
| Disable time S to nBn | tdis | 1 | 3.2 | 5 | ns | Tamb = -40 °C to +125 °C; S to nBn; see Fig. 12; VCC = 3.0 V to 3.6 V | 9 |
## CAD (KiCad official)
- Symbol: `74CBTLV3257PW-Q10J`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `74cbtlv3257pw-q10j-etched.step` / `74cbtlv3257pw-q10j-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74cbtlv3257pw-q10j.step` / `74cbtlv3257pw-q10j.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74CBTLV3257PW-Q10J.pdf) (17 pp, sha256 `a1b7b4b84f0b014f`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74cbtlv3257pw-q10j-datasheet.pdf)