# 74CBTLV3257D

**Nexperia** · Signal Switches, Multiplexers, Decoders · SO-16

74CBTLV3257D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Select input that connects nA to nB1 when LOW and to nB2 when HIGH, with Schmitt-trigger action that tolerates slow input edges (rise/fall rate up to 200 ns/V). |
| 2 | 1B1 | bidirectional | Switch port 1B1 input/output, connected to 1A when S is LOW and OE is LOW. |
| 3 | 1B2 | bidirectional | Switch port 1B2 input/output, connected to 1A when S is HIGH and OE is LOW. |
| 4 | 1A | bidirectional | Switch port 1A input/output, the common A terminal of switch 1; switch voltage must stay between 0 V and VCC when enabled or disabled. |
| 5 | 2B1 | bidirectional | Switch port 2B1 input/output, connected to 2A when S is LOW and OE is LOW. |
| 6 | 2B2 | bidirectional | Switch port 2B2 input/output, connected to 2A when S is HIGH and OE is LOW. |
| 7 | 2A | bidirectional | Switch port 2A input/output, the common A terminal of switch 2; switch voltage must stay between 0 V and VCC when enabled or disabled. |
| 8 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 9 | 3A | bidirectional | Switch port 3A input/output, the common A terminal of switch 3; switch voltage must stay between 0 V and VCC when enabled or disabled. |
| 10 | 3B2 | bidirectional | Switch port 3B2 input/output, connected to 3A when S is HIGH and OE is LOW. |
| 11 | 3B1 | bidirectional | Switch port 3B1 input/output, connected to 3A when S is LOW and OE is LOW. |
| 12 | 4A | bidirectional | Switch port 4A input/output, the common A terminal of switch 4; switch voltage must stay between 0 V and VCC when enabled or disabled. |
| 13 | 4B2 | bidirectional | Switch port 4B2 input/output, connected to 4A when S is HIGH and OE is LOW. |
| 14 | 4B1 | bidirectional | Switch port 4B1 input/output, connected to 4A when S is LOW and OE is LOW. |
| 15 | OE | input | Active-LOW output enable; when HIGH all switches are high-impedance OFF regardless of S, and it should be tied to VCC through a pull-up resistor to hold the OFF state during power-up or power-down. |
| 16 | VCC | power_in | Supply voltage, recommended operating range 2.3 V to 3.6 V (absolute maximum 4.6 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 |  | 4.6 | V |  | 6 |
| input voltage | VI | -0.5 |  | 4.6 | V | control inputs | 6 |
| switch voltage | VSW | -0.5 |  |  | V | enable and disable mode; max printed as VCC + 0.5 V | 6 |
| input clamping current | IIK | -50 |  |  | mA | VI < -0.5 V | 6 |
| switch clamping current | ISK | -50 |  |  | mA | VI < -0.5 V | 6 |
| switch current | ISW | -128 |  | 128 | mA | VSW = 0 V to VCC | 6 |
| supply current | ICC |  |  | 100 | mA |  | 6 |
| ground current | IGND | -100 |  |  | mA |  | 6 |
| storage temperature | Tstg | -65 |  | 150 | °C |  | 6 |
| total power dissipation | Ptot |  |  | 500 | mW | Tamb = -40 °C to +125 °C; SOT109-1 (SO16); derates 12.4 mW/K above 110 °C | 6 |
| supply voltage | VCC | 2.3 |  | 3.6 | V |  | 6 |
| input voltage | VI | 0 |  | 3.6 | V |  | 6 |
| switch voltage | VSW | 0 |  |  | V | enable and disable mode; max printed as VCC | 6 |
| ambient temperature | Tamb | -40 |  | 125 | °C |  | 6 |
| input transition rise and fall rate | Δt/ΔV | 0 |  | 200 | ns/V | VCC = 2.3 V to 3.6 V; applies to control signal levels | 6 |
| HIGH-level input voltage | VIH | 1.7 |  |  | V | VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 7 |
| HIGH-level input voltage | VIH | 2 |  |  | V | VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 7 |
| LOW-level input voltage | VIL |  |  | 0.7 | V | VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 7 |
| LOW-level input voltage | VIL |  |  | 0.9 | V | VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 7 |
| input leakage current | II | -20 |  | 20 | μA | pin OE, S; VCC = 3.6 V; VI = GND to VCC; Tamb = -40 °C to +125 °C | 7 |
| OFF-state leakage current | IS(OFF) | -20 |  | 20 | μA | VCC = 3.6 V; see Fig. 2; Tamb = -40 °C to +125 °C | 7 |
| ON-state leakage current | IS(ON) | -20 |  | 20 | μA | VCC = 3.6 V; see Fig. 3; Tamb = -40 °C to +125 °C | 7 |
| power-off leakage current | IOFF | -50 |  | 50 | μA | VI or VO = 0 V to 3.6 V; VCC = 0 V; Tamb = -40 °C to +125 °C | 7 |
| supply current | ICC |  |  | 50 | μA | VI = GND or VCC; VSW = GND or VCC; VCC = 3.6 V; IO = 0 A; Tamb = -40 °C to +125 °C | 7 |
| additional supply current | ΔICC |  |  | 2000 | μA | pin OE, S; VCC = 3.6 V; VI = VCC - 0.6 V; VSW = GND or VCC; Tamb = -40 °C to +125 °C | 7 |
| ON resistance | RON |  | 4.2 | 15 | Ω | VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V; Tamb = -40 °C to +125 °C | 8 |
| ON resistance | RON |  | 8.4 | 60 | Ω | VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V; Tamb = -40 °C to +125 °C | 8 |
| ON resistance | RON |  | 4 | 11 | Ω | VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V; Tamb = -40 °C to +125 °C | 8 |
| ON resistance | RON |  | 6.2 | 25.5 | Ω | VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V; Tamb = -40 °C to +125 °C | 8 |
| propagation delay | tpd |  |  | 0.25 | ns | nA to nBn or nBn to nA; see Fig. 11; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 10 |
| propagation delay | tpd | 1 | 3.8 | 6.7 | ns | S to nA; see Fig. 11; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 10 |
| propagation delay | tpd | 1 | 3.2 | 5.8 | ns | S to nA; see Fig. 11; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 10 |
| enable time | ten | 1 | 2.2 | 6.2 | ns | OE to nA or nBn; see Fig. 12; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 10 |
| enable time | ten | 1 | 2 | 5.5 | ns | OE to nA or nBn; see Fig. 12; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 10 |
| enable time | ten | 1 | 3.5 | 6.7 | ns | S to nBn; see Fig. 12; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 10 |
| enable time | ten | 1 | 3 | 5.8 | ns | S to nBn; see Fig. 12; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 10 |
| disable time | tdis | 1 | 2.6 | 6.1 | ns | OE to nA or nBn; see Fig. 12; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 11 |
| disable time | tdis | 1 | 3.1 | 6.1 | ns | OE to nA or nBn; see Fig. 12; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 11 |
| disable time | tdis | 1 | 2.6 | 5.3 | ns | S to nBn; see Fig. 12; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C | 11 |
| disable time | tdis | 1 | 3.2 | 5 | ns | S to nBn; see Fig. 12; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C | 11 |

## CAD (KiCad official)

- Symbol: `74CBTLV3257D`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files: `74cbtlv3257d-etched.step` / `74cbtlv3257d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74cbtlv3257d.step` / `74cbtlv3257d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588913902084370432) (21 pp, sha256 `7f71a4c9b6643bae`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/74cbtlv3257d-datasheet.pdf)