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74CBTLV3253PW
Public Made by Adomby adom
Nexperia Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74CBTLV3253PW
Nexperia · Signal Switches, Multiplexers, Decoders · TSSOP-16
74CBTLV3253PW from Nexperia, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for the 1A switches, active LOW; a HIGH level disconnects 1A and 1Bn into the high-impedance OFF-state. |
| 2 | S1 | input | Common select input (with S0) that chooses which B port of each multiplexer is connected to its A port, per the function table. |
| 3 | 1B4 | bidirectional | B input/output of switch channel 1, selected when S1 = HIGH, S0 = HIGH with 1OE LOW; rail-to-rail switching on data I/O. |
| 4 | 1B3 | bidirectional | B input/output of switch channel 1, selected when S1 = HIGH, S0 = LOW with 1OE LOW; rail-to-rail switching on data I/O. |
| 5 | 1B2 | bidirectional | B input/output of switch channel 1, selected when S1 = LOW, S0 = HIGH with 1OE LOW; rail-to-rail switching on data I/O. |
| 6 | 1B1 | bidirectional | B input/output of switch channel 1, selected when S1 = LOW, S0 = LOW with 1OE LOW; rail-to-rail switching on data I/O. |
| 7 | 1A | bidirectional | A input/output of the first multiplexer, connected to 1B1 to 1B4 by the select inputs; rail-to-rail switching on data I/O. |
| 8 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 9 | 2A | bidirectional | A input/output of the second multiplexer, connected to 2B1 to 2B4 by the select inputs; rail-to-rail switching on data I/O. |
| 10 | 2B1 | bidirectional | B input/output of switch channel 2, selected when S1 = LOW, S0 = LOW with 2OE LOW; rail-to-rail switching on data I/O. |
| 11 | 2B2 | bidirectional | B input/output of switch channel 2, selected when S1 = LOW, S0 = HIGH with 2OE LOW; rail-to-rail switching on data I/O. |
| 12 | 2B3 | bidirectional | B input/output of switch channel 2, selected when S1 = HIGH, S0 = LOW with 2OE LOW; rail-to-rail switching on data I/O. |
| 13 | 2B4 | bidirectional | B input/output of switch channel 2, selected when S1 = HIGH, S0 = HIGH with 2OE LOW; rail-to-rail switching on data I/O. |
| 14 | S0 | input | Common select input (with S1) that chooses which B port of each multiplexer is connected to its A port, per the function table. |
| 15 | 2OE | input | Output enable input for the 2A switches, active LOW; a HIGH level disconnects 2A and 2Bn into the high-impedance OFF-state. |
| 16 | VCC | power_in | Supply voltage, 2.3 V to 3.6 V recommended operating range; absolute maximum is -0.5 V to +4.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage (absolute maximum) | VCC | -0.5 | 4.6 | V | 4 | ||
| Input voltage, control inputs | VI | -0.5 | 4.6 | V | 4 | ||
| Switch voltage, enable and disable mode | VSW | -0.5 | V | 4 | |||
| Input clamping current | IIK | -50 | mA | VI < -0.5 V | 4 | ||
| Switch clamping current | ISK | -50 | mA | VI < -0.5 V | 4 | ||
| Switch current | ISW | -128 | 128 | mA | VSW = 0 V to VCC | 4 | |
| Supply current | ICC | 100 | mA | 4 | |||
| Ground current | IGND | -100 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| Supply voltage | VCC | 2.3 | 3.6 | V | 4 | ||
| Input voltage | VI | 0 | 3.6 | V | 4 | ||
| Switch voltage, enable and disable mode | VSW | 0 | V | 4 | |||
| Ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 0 | 200 | ns/V | VCC = 2.3 V to 3.6 V; applies to control signal levels | 4 | |
| HIGH-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC = 3.0 V to 3.6 V | 5 | ||
| LOW-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| LOW-level input voltage | VIL | 0.9 | V | VCC = 3.0 V to 3.6 V | 5 | ||
| Input leakage current | II | -20 | 20 | μA | pin nOE; VI = GND to VCC; VCC = 3.6 V | 5 | |
| OFF-state leakage current | IS(OFF) | -20 | 20 | μA | VCC = 3.6 V; see Fig. 5 | 5 | |
| ON-state leakage current | IS(ON) | -20 | 20 | μA | VCC = 3.6 V; see Fig. 6 | 5 | |
| Power-off leakage current | IOFF | -50 | 50 | μA | VI or VO = 0 V to 3.6 V; VCC = 0 V | 5 | |
| Supply current | ICC | 50 | μA | VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V | 5 | ||
| Additional supply current | ΔICC | 2000 | μA | pin nOE; VI = VCC - 0.6 V; VSW = GND or VCC; VCC = 3.6 V; one input at 3 V, other inputs at VCC or GND | 5 | ||
| ON resistance | RON | 4.2 | 15 | Ω | VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V | 6 | |
| ON resistance | RON | 8.4 | 60 | Ω | VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V | 6 | |
| ON resistance | RON | 4 | 11 | Ω | VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V | 6 | |
| ON resistance | RON | 6.2 | 25.5 | Ω | VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V | 6 | |
| Propagation delay, nA to nBn or nBn to nA | tpd | 0.25 | ns | VCC = 2.3 V to 2.7 V; see Fig. 14 | 8 | ||
| Propagation delay, Sn to nA | tpd | 1 | 2.2 | 7.5 | ns | VCC = 2.3 V to 2.7 V; see Fig. 14 | 8 |
| Propagation delay, Sn to nA | tpd | 1 | 2 | 6.1 | ns | VCC = 3.0 V to 3.6 V; see Fig. 14 | 8 |
| Enable time, nOE to nA or nBn | ten | 1 | 2.1 | 5.5 | ns | VCC = 2.3 V to 2.7 V; see Fig. 15 | 8 |
| Enable time, nOE to nA or nBn | ten | 1 | 1.9 | 5.3 | ns | VCC = 3.0 V to 3.6 V; see Fig. 15 | 8 |
| Enable time, Sn to nBn | ten | 1 | 2.1 | 4.7 | ns | VCC = 2.3 V to 2.7 V; see Fig. 15 | 8 |
| Enable time, Sn to nBn | ten | 1 | 1.9 | 4.4 | ns | VCC = 3.0 V to 3.6 V; see Fig. 15 | 8 |
| Disable time, nOE to nA or nBn | tdis | 1 | 2.6 | 6.1 | ns | VCC = 2.3 V to 2.7 V; see Fig. 15 | 9 |
| Disable time, nOE to nA or nBn | tdis | 1 | 3.2 | 5.9 | ns | VCC = 3.0 V to 3.6 V; see Fig. 15 | 9 |
| Disable time, Sn to nBn | tdis | 0.8 | 2 | 5.3 | ns | VCC = 2.3 V to 2.7 V; see Fig. 15 | 9 |
| Disable time, Sn to nBn | tdis | 1 | 2 | 5 | ns | VCC = 3.0 V to 3.6 V; see Fig. 15 | 9 |
CAD (KiCad official)
- Symbol:
74CBTLV3253PW - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
74cbtlv3253pw-etched.step/74cbtlv3253pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74cbtlv3253pw.step/74cbtlv3253pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (18 pp, sha256
38b98574a7289140, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).