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74CBTLV3126PW

Nexperia · Logic ICs · TSSOP-14

74CBTLV3126PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input for switch 1; the switch is OFF (high-impedance) when LOW and ON when HIGH, and nOE should be tied to GND through a pull-down resistor to keep the OFF-state during power-up or power-down.
2 1A bidirectional A input/output of switch 1, a 5 Ω switch connection to port 1B with rail-to-rail switching and switch current limited to ±128 mA maximum.
3 1B bidirectional B output/input of switch 1, a 5 Ω switch connection to port 1A with rail-to-rail switching and switch current limited to ±128 mA maximum.
4 2OE input Output enable input for switch 2; the switch is OFF (high-impedance) when LOW and ON when HIGH.
5 2A bidirectional A input/output of switch 2, a 5 Ω switch connection to port 2B with rail-to-rail switching and switch current limited to ±128 mA maximum.
6 2B bidirectional B output/input of switch 2, a 5 Ω switch connection to port 2A with rail-to-rail switching and switch current limited to ±128 mA maximum.
7 GND power_in Ground (0 V) reference for all voltages on the device.
8 3B bidirectional B output/input of switch 3, a 5 Ω switch connection to port 3A with rail-to-rail switching and switch current limited to ±128 mA maximum.
9 3A bidirectional A input/output of switch 3, a 5 Ω switch connection to port 3B with rail-to-rail switching and switch current limited to ±128 mA maximum.
10 3OE input Output enable input for switch 3; the switch is OFF (high-impedance) when LOW and ON when HIGH.
11 4B bidirectional B output/input of switch 4, a 5 Ω switch connection to port 4A with rail-to-rail switching and switch current limited to ±128 mA maximum.
12 4A bidirectional A input/output of switch 4, a 5 Ω switch connection to port 4B with rail-to-rail switching and switch current limited to ±128 mA maximum.
13 4OE input Output enable input for switch 4; the switch is OFF (high-impedance) when LOW and ON when HIGH.
14 VCC power_in Supply voltage, recommended range 2.3 V to 3.6 V with an absolute maximum of 4.6 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC 2.3 3.6 V 4
input voltage control inputs VI 0 3.6 V 4
switch voltage enable and disable mode VSW 0 V enable and disable mode; max VCC 4
ambient temperature Tamb -40 125 °C 4
input transition rise and fall rate Δt/ΔV 0 200 ns/V pin nOE; VCC = 2.3 V to 3.6 V 4
supply voltage VCC -0.5 4.6 V 4
input voltage VI -0.5 4.6 V control inputs 4
switch voltage VSW -0.5 V enable and disable mode; max VCC + 0.5 V 4
input clamping current IIK -50 mA VI < -0.5 V 4
switch clamping current ISK -50 mA VI < -0.5 V 4
switch current ISW -128 128 mA VSW = 0 V to VCC 4
supply current ICC 100 mA 4
ground current IGND -100 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
HIGH-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 5
HIGH-level input voltage VIH 2 V VCC = 3.0 V to 3.6 V 5
LOW-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 5
LOW-level input voltage VIL 0.9 V VCC = 3.0 V to 3.6 V 5
input leakage current II -20 20 μA pin nOE; VI = GND to VCC; VCC = 3.6 V 5
OFF-state leakage current IS(OFF) -20 20 μA VCC = 3.6 V; see Fig. 3 5
ON-state leakage current IS(ON) -20 20 μA VCC = 3.6 V; see Fig. 4 5
power-off leakage current IOFF -50 50 μA VI or VO = 0 V to 3.6 V; VCC = 0 V 5
supply current ICC 50 μA VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V 5
additional supply current ΔICC 2000 μA pin nOE; VI = VCC - 0.6 V; VSW = GND or VCC; VCC = 3.6 V 5
ON resistance RON 15 Ω VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V 6
ON resistance RON 60 Ω VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V 6
ON resistance RON 11 Ω VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V 6
ON resistance RON 25.5 Ω VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V 6
propagation delay tpd 0.2 ns nA to nB or nB to nA; see Fig. 13; VCC = 2.3 V to 2.7 V 9
propagation delay tpd 0.31 ns nA to nB or nB to nA; see Fig. 13; VCC = 3.0 V to 3.6 V 9
enable time ten 1 2.5 6 ns nOE to nA or nB; see Fig. 14; VCC = 2.3 V to 2.7 V 9
enable time ten 1 2.2 6 ns nOE to nA or nB; see Fig. 14; VCC = 3.0 V to 3.6 V 9
disable time tdis 1 2.6 6.5 ns nOE to nA or nB; see Fig. 14; VCC = 2.3 V to 2.7 V 9
disable time tdis 1 3.4 6.5 ns nOE to nA or nB; see Fig. 14; VCC = 3.0 V to 3.6 V 9

CAD (KiCad official)

  • Symbol: 74CBTLV3126PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74cbtlv3126pw-etched.step / 74cbtlv3126pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74cbtlv3126pw.step / 74cbtlv3126pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (17 pp, sha256 7882e9fbd9f2a76a, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF