component
74CBTLV3125PW
Public Made by Adomby adom
Nexperia Signal Switches, Multiplexers, Decoders, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74CBTLV3125PW
Nexperia · Signal Switches, Multiplexers, Decoders · TSSOP-14
74CBTLV3125PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Output enable input for switch 1; the switch is ON when LOW and OFF (high-impedance) when HIGH, and nOE should be tied to VCC through a pull-up resistor to hold the OFF-state during power-up or power-down. |
| 2 | 1A | bidirectional | A input/output terminal of switch 1, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 3 | 1B | bidirectional | B output/input terminal of switch 1, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 4 | 2OE | input | Output enable input for switch 2; the switch is ON when LOW and OFF (high-impedance) when HIGH, and nOE should be tied to VCC through a pull-up resistor to hold the OFF-state during power-up or power-down. |
| 5 | 2A | bidirectional | A input/output terminal of switch 2, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 6 | 2B | bidirectional | B output/input terminal of switch 2, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 7 | GND | power_in | Ground (0 V) for the device; the datasheet states voltages are referenced to GND. |
| 8 | 3B | bidirectional | B output/input terminal of switch 3, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 9 | 3A | bidirectional | A input/output terminal of switch 3, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 10 | 3OE | input | Output enable input for switch 3; the switch is ON when LOW and OFF (high-impedance) when HIGH, and nOE should be tied to VCC through a pull-up resistor to hold the OFF-state during power-up or power-down. |
| 11 | 4B | bidirectional | B output/input terminal of switch 4, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 12 | 4A | bidirectional | A input/output terminal of switch 4, which supports rail-to-rail switching on data I/O ports with a 5 Ω switch connection between the two ports. |
| 13 | 4OE | input | Output enable input for switch 4; the switch is ON when LOW and OFF (high-impedance) when HIGH, and nOE should be tied to VCC through a pull-up resistor to hold the OFF-state during power-up or power-down. |
| 14 | VCC | power_in | Positive supply voltage, specified from 2.3 V to 3.6 V under recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIH HIGH-level input voltage | VIH | 1.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| VIH HIGH-level input voltage | VIH | 2 | V | VCC = 3.0 V to 3.6 V | 5 | ||
| VIL LOW-level input voltage | VIL | 0.7 | V | VCC = 2.3 V to 2.7 V | 5 | ||
| VIL LOW-level input voltage | VIL | 0.9 | V | VCC = 3.0 V to 3.6 V | 5 | ||
| Input leakage current | II | -20 | 20 | μA | pin nOE; VI = GND to VCC; VCC = 3.6 V | 5 | |
| OFF-state leakage current | IS(OFF) | -20 | 20 | μA | VCC = 3.6 V; see Fig. 6 | 5 | |
| ON-state leakage current | IS(ON) | -20 | 20 | μA | VCC = 3.6 V; see Fig. 7 | 5 | |
| Power-off leakage current | IOFF | -50 | 50 | μA | VI or VO = 0 V to 3.6 V; VCC = 0 V | 5 | |
| Supply current | ICC | 50 | μA | VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V | 5 | ||
| Additional supply current | ΔICC | 2000 | μA | pin nOE; VI = VCC - 0.6 V; VSW = GND or VCC; VCC = 3.6 V; one input at 3 V, other inputs at VCC or GND | 5 | ||
| ON resistance RON | RON | 4.2 | 15 | Ω | VCC = 2.3 V to 2.7 V; ISW = 64 mA; VI = 0 V | 6 | |
| ON resistance RON | RON | 8.4 | 60 | Ω | VCC = 2.3 V to 2.7 V; ISW = 15 mA; VI = 1.7 V | 6 | |
| ON resistance RON | RON | 4 | 11 | Ω | VCC = 3.0 V to 3.6 V; ISW = 64 mA; VI = 0 V | 6 | |
| ON resistance RON | RON | 6.2 | 25.5 | Ω | VCC = 3.0 V to 3.6 V; ISW = 15 mA; VI = 2.4 V | 6 | |
| Propagation delay | tpd | 0.2 | ns | nA to nB or nB to nA; see Fig. 15; VCC = 2.3 V to 2.7 V | 8 | ||
| Propagation delay | tpd | 0.31 | ns | nA to nB or nB to nA; see Fig. 15; VCC = 3.0 V to 3.6 V | 8 | ||
| Enable time | ten | 1 | 2.7 | 6 | ns | nOE to nA or nB; see Fig. 16; VCC = 2.3 V to 2.7 V | 8 |
| Enable time | ten | 1 | 2.4 | 6 | ns | nOE to nA or nB; see Fig. 16; VCC = 3.0 V to 3.6 V | 8 |
| Disable time | tdis | 1 | 2.2 | 5.5 | ns | nOE to nA or nB; see Fig. 16; VCC = 2.3 V to 2.7 V | 8 |
| Disable time | tdis | 1 | 2.9 | 5.5 | ns | nOE to nA or nB; see Fig. 16; VCC = 3.0 V to 3.6 V | 8 |
| Supply voltage | VCC | 2.3 | 3.6 | V | 4 | ||
| Input voltage control inputs | VI | 0 | 3.6 | V | control inputs | 4 | |
| Switch voltage | VSW | 0 | V | enable and disable mode | 4 | ||
| Ambient temperature | Tamb | -40 | 125 | °C | 4 | ||
| Input transition rise and fall rate | Δt/ΔV | 0 | 200 | ns/V | pin nOE; VCC = 2.3 V to 3.6 V | 4 | |
| Supply voltage | VCC | -0.5 | 4.6 | V | 4 | ||
| Input voltage | VI | -0.5 | 4.6 | V | control inputs | 4 | |
| Switch voltage | VSW | -0.5 | V | enable and disable mode | 4 | ||
| Input clamping current | IIK | -50 | mA | VI < -0.5 V | 4 | ||
| Switch clamping current | ISK | -50 | mA | VI < -0.5 V | 4 | ||
| Switch current | ISW | -128 | 128 | mA | VSW = 0 V to VCC | 4 | |
| Supply current | ICC | 100 | mA | 4 | |||
| Ground current | IGND | -100 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 |
CAD (KiCad official)
- Symbol:
74CBTLV3125PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74cbtlv3125pw-etched.step/74cbtlv3125pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74cbtlv3125pw.step/74cbtlv3125pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
311106d491fef2b6, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).