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74AVCH8T245PW:118

Nexperia · Translators, Level Shifters · TSSOP-24

74AVCH8T245PW:118 from Nexperia, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC(A) power_in Supply voltage A, specified from 0.8 V to 3.6 V; the An, OE and DIR inputs are referenced to VCC(A).
2 DIR input Direction control input: HIGH allows transmission from An to Bn, LOW allows transmission from Bn to An.
3 A1 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
4 A2 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
5 A3 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
6 A4 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
7 A5 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
8 A6 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
9 A7 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
10 A8 bidirectional Data input or output on the VCC(A)-referenced A side; high-impedance OFF-state when OE is HIGH.
11 GND power_in Ground (0 V); all GND pins must be connected to ground.
12 GND power_in Ground (0 V); all GND pins must be connected to ground.
13 GND power_in Ground (0 V); all GND pins must be connected to ground.
14 B8 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
15 B7 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
16 B6 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
17 B5 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
18 B4 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
19 B3 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
20 B2 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
21 B1 bidirectional Data input or output on the VCC(B)-referenced B side; high-impedance OFF-state when OE is HIGH.
22 OE input Output enable input, active LOW; HIGH puts the An and Bn outputs in the high-impedance OFF-state.
23 VCC(B) power_in Supply voltage B, specified from 0.8 V to 3.6 V; the Bn inputs are referenced to VCC(B).
24 VCC(B) power_in Supply voltage B, specified from 0.8 V to 3.6 V; the Bn inputs are referenced to VCC(B).

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-24
Category Logic
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC(A) supply voltage A VCC(A) -0.5 4.6 V 4
VCC(B) supply voltage B VCC(B) -0.5 4.6 V 4
input clamping current IIK -50 mA VI < 0 V 4
input voltage VI -0.5 4.6 V 4
output clamping current IOK -50 mA VO < 0 V 4
output voltage, active mode VO -0.5 V Active mode 4
output voltage, suspend or 3-state mode VO -0.5 4.6 V Suspend or 3-state mode 4
output current IO -50 50 mA VO = 0 V to VCC 4
supply current per VCC pin ICC 100 mA per VCC(A) or VCC(B) pin 4
ground current per GND pin IGND -100 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
VCC(A) supply voltage A VCC(A) 0.8 3.6 V 5
VCC(B) supply voltage B VCC(B) 0.8 3.6 V 5
input voltage VI 0 3.6 V 5
output voltage, active mode VO 0 V Active mode 5
output voltage, suspend or 3-state mode VO 0 3.6 V Suspend or 3-state mode 5
ambient temperature Tamb -40 125 °C 5
input transition rise and fall rate Δt/ΔV 5 ns/V VCCI = 0.8 V to 3.6 V 5
HIGH-level input voltage, data input VIH 1.6 V -40 °C to +125 °C; VCCI = 2.3 V to 2.7 V 6
HIGH-level input voltage, data input VIH 2 V -40 °C to +125 °C; VCCI = 3.0 V to 3.6 V 6
HIGH-level input voltage, DIR and OE input VIH 1.6 V -40 °C to +125 °C; VCC(A) = 2.3 V to 2.7 V 6
HIGH-level input voltage, DIR and OE input VIH 2 V -40 °C to +125 °C; VCC(A) = 3.0 V to 3.6 V 6
LOW-level input voltage, data input VIL 0.7 V -40 °C to +125 °C; VCCI = 2.3 V to 2.7 V 6
LOW-level input voltage, data input VIL 0.8 V -40 °C to +125 °C; VCCI = 3.0 V to 3.6 V 6
LOW-level input voltage, DIR and OE input VIL 0.7 V -40 °C to +125 °C; VCC(A) = 2.3 V to 2.7 V 6
LOW-level input voltage, DIR and OE input VIL 0.8 V -40 °C to +125 °C; VCC(A) = 3.0 V to 3.6 V 6
HIGH-level output voltage VOH 0.85 V -40 °C to +125 °C; IO = -3 mA; VCC(A) = VCC(B) = 1.1 V 6
HIGH-level output voltage VOH 1.05 V -40 °C to +125 °C; IO = -6 mA; VCC(A) = VCC(B) = 1.4 V 6
HIGH-level output voltage VOH 1.2 V -40 °C to +125 °C; IO = -8 mA; VCC(A) = VCC(B) = 1.65 V 6
HIGH-level output voltage VOH 1.75 V -40 °C to +125 °C; IO = -9 mA; VCC(A) = VCC(B) = 2.3 V 6
HIGH-level output voltage VOH 2.3 V -40 °C to +125 °C; IO = -12 mA; VCC(A) = VCC(B) = 3.0 V 6
LOW-level output voltage VOL 0.1 V -40 °C to +125 °C; IO = 100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V 7
LOW-level output voltage VOL 0.25 V -40 °C to +125 °C; IO = 3 mA; VCC(A) = VCC(B) = 1.1 V 7
LOW-level output voltage VOL 0.35 V -40 °C to +125 °C; IO = 6 mA; VCC(A) = VCC(B) = 1.4 V 7
LOW-level output voltage VOL 0.45 V -40 °C to +125 °C; IO = 8 mA; VCC(A) = VCC(B) = 1.65 V 7
LOW-level output voltage VOL 0.55 V -40 °C to +125 °C; IO = 9 mA; VCC(A) = VCC(B) = 2.3 V 7
LOW-level output voltage VOL 0.7 V -40 °C to +125 °C; IO = 12 mA; VCC(A) = VCC(B) = 3.0 V 7
input leakage current II -5 5 μA -40 °C to +125 °C; DIR, OE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V 7
bus hold LOW current, A or B port IBHL 15 μA -40 °C to +125 °C; VI = 0.49 V; VCC(A) = VCC(B) = 1.4 V 7
bus hold LOW current, A or B port IBHL 25 μA -40 °C to +125 °C; VI = 0.58 V; VCC(A) = VCC(B) = 1.65 V 7
bus hold LOW current, A or B port IBHL 45 μA -40 °C to +125 °C; VI = 0.70 V; VCC(A) = VCC(B) = 2.3 V 7
bus hold LOW current, A or B port IBHL 90 μA -40 °C to +125 °C; VI = 0.80 V; VCC(A) = VCC(B) = 3.0 V 7
bus hold HIGH current, A or B port IBHH -15 μA -40 °C to +125 °C; VI = 0.91 V; VCC(A) = VCC(B) = 1.4 V 7
bus hold HIGH current, A or B port IBHH -25 μA -40 °C to +125 °C; VI = 1.07 V; VCC(A) = VCC(B) = 1.65 V 7
bus hold HIGH current, A or B port IBHH -45 μA -40 °C to +125 °C; VI = 1.60 V; VCC(A) = VCC(B) = 2.3 V 7
bus hold HIGH current, A or B port IBHH -100 μA -40 °C to +125 °C; VI = 2.00 V; VCC(A) = VCC(B) = 3.0 V 7
supply current, A port ICC 55 μA -40 °C to +125 °C; A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 8
supply current, A port ICC 50 μA -40 °C to +125 °C; A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V 8
supply current, A port ICC -12 μA -40 °C to +125 °C; A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0 V; VCC(B) = 3.6 V 8
supply current, B port ICC 55 μA -40 °C to +125 °C; B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 8
supply current, B port ICC 50 μA -40 °C to +125 °C; B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V 8
supply current, B port ICC -12 μA -40 °C to +125 °C; B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 3.6 V; VCC(B) = 0 V 8
supply current, A plus B port (ICC(A) + ICC(B)) ICC 70 μA -40 °C to +125 °C; IO = 0 A; VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 8
supply current, A plus B port (ICC(A) + ICC(B)) ICC 65 μA -40 °C to +125 °C; IO = 0 A; VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V 8

CAD (KiCad official)

  • Symbol: 74AVCH8T245PW:118
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: 74avch8t245pw-118-etched.step / 74avch8t245pw-118-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74avch8t245pw-118.step / 74avch8t245pw-118.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (23 pp, sha256 fcbfc4f6c1d2fdab, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF