component

74AVC9112DCH

Public Made by Adom

by adom

Nexperia Clock Buffers, Drivers, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentclock and timing74avc9112dchfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers 74avc9112dch: viewers · Ray 8d ago
74avc9112dch-etched.glb Publish 0.1.0 · Ray 8d ago
74avc9112dch-etched.step 74avc9112dch: factory component page (tier=mfr) · Ray 8d ago
74avc9112dch-hero.glb 74avc9112dch: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
74avc9112dch-hero.overlay.json Publish 0.1.0 · Ray 8d ago
74avc9112dch.glb Publish 0.1.0 · Ray 8d ago
74avc9112dch.kicad_mod Publish 0.1.0 · Ray 8d ago
74avc9112dch.kicad_sym Publish 0.1.0 · Ray 8d ago
74avc9112dch.lbr Publish 0.1.0 · Ray 8d ago
74avc9112dch.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago

74AVC9112DCH

Nexperia · Clock Buffers, Drivers · VSSOP-8-0.5mm

74AVC9112DCH from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage, 0.8 V to 3.6 V recommended operating range (absolute maximum -0.5 V to +4.6 V).
2 A input Data input with Schmitt trigger action that accepts voltages up to 3.6 V and drives all four outputs Y1 to Y4.
3 OE input Output enable input, active LOW: LOW enables the outputs and disconnects the pull-down resistors, while HIGH pulls all outputs LOW through pull-down resistors (50 kΩ typical); accepts voltages up to 3.6 V.
4 GND power_in Ground (0 V).
5 Y1 output Data output 1, follows A when OE is LOW and is pulled LOW when OE is HIGH; drives up to ±12 mA at VCC = 3.0 V for the stated VOH/VOL limits.
6 Y2 output Data output 2, follows A when OE is LOW and is pulled LOW when OE is HIGH; drives up to ±12 mA at VCC = 3.0 V for the stated VOH/VOL limits.
7 Y3 output Data output 3, follows A when OE is LOW and is pulled LOW when OE is HIGH; drives up to ±12 mA at VCC = 3.0 V for the stated VOH/VOL limits.
8 Y4 output Data output 4, follows A when OE is LOW and is pulled LOW when OE is HIGH; drives up to ±12 mA at VCC = 3.0 V for the stated VOH/VOL limits.

Key specifications

Parameter Value
Manufacturer Nexperia
Package VSSOP-8-0.5mm
Category Clock and Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 4.6 V 4
Input voltage VI -0.5 4.6 V 4
Output voltage, OE = LOW VO -0.5 V OE = LOW; max is VCC + 0.5 V 4
Output voltage, OE = HIGH VO -0.5 4.6 V OE = HIGH 4
Input clamping current IIK -50 mA VI < 0 V 4
Output clamping current IOK -50 mA VO < 0 V 4
Output current IO -50 50 mA VO = 0 V to VCC 4
Supply current ICC 100 mA 4
Ground current IGND -100 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 250 mW Tamb = -40 °C to +125 °C; VSSOP8 derates 4.9 mW/K above 99 °C 4
Supply voltage VCC 0.8 3.6 V 4
Input voltage VI 0 3.6 V 4
Output voltage, OE = LOW VO 0 V OE = LOW; max is VCC 4
Output voltage, OE = HIGH VO 0 3.6 V OE = HIGH 4
Ambient temperature Tamb -40 125 °C 4
Input transition rise and fall rate Δt/ΔV 0 200 ns/V VCC = 0.8 V to 3.6 V 4
Input leakage current II 0.025 0.25 μA A, OE input; VI = 0 V or 3.6 V; VCC = 0.8 V to 3.6 V; Tamb = 25 °C (typ ±0.025, max ±0.25) 5
Power-off leakage current IOFF 0.1 1 μA VI or VO = 0 V to 3.6 V; VCC = 0 V; Tamb = 25 °C (typ ±0.1, max ±1) 5
HIGH-level input voltage VIH 1.6 V A, OE input; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C 5
HIGH-level input voltage VIH 2 V A, OE input; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C 5
LOW-level input voltage VIL 0.7 V A, OE input; VCC = 2.3 V to 2.7 V; Tamb = -40 °C to +125 °C 5
LOW-level input voltage VIL 0.8 V A, OE input; VCC = 3.0 V to 3.6 V; Tamb = -40 °C to +125 °C 5
HIGH-level output voltage VOH 0.85 V VI = VIH or VIL; IO = -3 mA; VCC = 1.1 V; Tamb = -40 °C to +125 °C 5
HIGH-level output voltage VOH 1.05 V VI = VIH or VIL; IO = -6 mA; VCC = 1.4 V; Tamb = -40 °C to +125 °C 5
HIGH-level output voltage VOH 1.2 V VI = VIH or VIL; IO = -8 mA; VCC = 1.65 V; Tamb = -40 °C to +125 °C 5
HIGH-level output voltage VOH 1.75 V VI = VIH or VIL; IO = -9 mA; VCC = 2.3 V; Tamb = -40 °C to +125 °C 5
HIGH-level output voltage VOH 2.3 V VI = VIH or VIL; IO = -12 mA; VCC = 3.0 V; Tamb = -40 °C to +125 °C 5
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 100 μA; VCC = 0.8 V to 3.6 V; Tamb = -40 °C to +125 °C 5
LOW-level output voltage VOL 0.25 V VI = VIH or VIL; IO = 3 mA; VCC = 1.1 V; Tamb = -40 °C to +125 °C 5
LOW-level output voltage VOL 0.35 V VI = VIH or VIL; IO = 6 mA; VCC = 1.4 V; Tamb = -40 °C to +125 °C 5
LOW-level output voltage VOL 0.45 V VI = VIH or VIL; IO = 8 mA; VCC = 1.65 V; Tamb = -40 °C to +125 °C 5
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; IO = 9 mA; VCC = 2.3 V; Tamb = -40 °C to +125 °C 5
LOW-level output voltage VOL 0.7 V VI = VIH or VIL; IO = 12 mA; VCC = 3.0 V; Tamb = -40 °C to +125 °C 5
Input leakage current II -5 5 μA A, OE input; VI = 0 V or 3.6 V; VCC = 0.8 V to 3.6 V; Tamb = -40 °C to +125 °C 6
Power-off leakage current IOFF -30 30 μA VI or VO = 0 V to 3.6 V; VCC = 0 V; Tamb = -40 °C to +125 °C 6
Supply current ICC 50 μA VI = 0 V or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V; Tamb = -40 °C to +125 °C 6
Propagation delay A to Yn tpd 0.9 15.7 ns VCC = 1.2 V ± 0.1 V; Tamb = -40 °C to +125 °C 6
Propagation delay A to Yn tpd 0.7 10.4 ns VCC = 1.5 V ± 0.1 V; Tamb = -40 °C to +125 °C 6
Propagation delay A to Yn tpd 0.6 8.3 ns VCC = 1.8 V ± 0.15 V; Tamb = -40 °C to +125 °C 6
Propagation delay A to Yn tpd 0.5 5.9 ns VCC = 2.5 V ± 0.2 V; Tamb = -40 °C to +125 °C 6
Propagation delay A to Yn tpd 0.4 4.9 ns VCC = 3.3 V ± 0.3 V; Tamb = -40 °C to +125 °C 6
Disable time OE to Yn tdis 1 16.5 ns VCC = 1.2 V ± 0.1 V; Tamb = -40 °C to +125 °C 6
Disable time OE to Yn tdis 0.8 11 ns VCC = 1.5 V ± 0.1 V; Tamb = -40 °C to +125 °C 6
Disable time OE to Yn tdis 0.8 10 ns VCC = 1.8 V ± 0.15 V; Tamb = -40 °C to +125 °C 6
Disable time OE to Yn tdis 0.6 7.5 ns VCC = 2.5 V ± 0.2 V; Tamb = -40 °C to +125 °C 6
Disable time OE to Yn tdis 0.7 7.7 ns VCC = 3.3 V ± 0.3 V; Tamb = -40 °C to +125 °C 6
Enable time OE to Yn ten 1 16.9 ns VCC = 1.2 V ± 0.1 V; Tamb = -40 °C to +125 °C 6
Enable time OE to Yn ten 0.7 10.9 ns VCC = 1.5 V ± 0.1 V; Tamb = -40 °C to +125 °C 6
Enable time OE to Yn ten 0.6 8.7 ns VCC = 1.8 V ± 0.15 V; Tamb = -40 °C to +125 °C 6
Enable time OE to Yn ten 0.6 6.1 ns VCC = 2.5 V ± 0.2 V; Tamb = -40 °C to +125 °C 6
Enable time OE to Yn ten 0.5 4.9 ns VCC = 3.3 V ± 0.3 V; Tamb = -40 °C to +125 °C 6
HIGH-level output voltage VOH 0.69 V VI = VIH or VIL; IO = -1.5 mA; VCC = 0.8 V; Tamb = 25 °C 5
LOW-level output voltage VOL 0.07 V VI = VIH or VIL; IO = 1.5 mA; VCC = 0.8 V; Tamb = 25 °C 5
Pull-down resistance Rpd 50 kΩ Tamb = 25 °C 5
Input capacitance CI 1.2 pF A, OE input; VI = 0 V or 3.3 V; VCC = 3.3 V 5
Output capacitance CO 4.7 pF Yn; VO = 3.3 V or 0 V; VCC = 3.3 V 5
Propagation delay A to Yn tpd 31 ns VCC = 0.8 V; Tamb = 25 °C 6

CAD (KiCad official)

  • Symbol: 74AVC9112DCH
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
  • 3D model files: 74avc9112dch-etched.step / 74avc9112dch-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74avc9112dch.step / 74avc9112dch.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 ea5aff40558cfbab, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF