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74AVC4T245BQ

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Nexperia Translators, Level Shifters, DHVQFN-16-EP(2.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AVC4T245BQ

Nexperia · Translators, Level Shifters · DHVQFN-16-EP(2.5x3.5)

74AVC4T245BQ from Nexperia, in a DHVQFN-16-EP(2.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC(A) power_in Supply voltage A, 0.8 V to 3.6 V; the nAn, nOE and nDIR inputs are referenced to VCC(A).
2 1DIR input Direction control for the 1An/1Bn channel: HIGH allows transmission from 1An to 1Bn and LOW allows transmission from 1Bn to 1An.
3 2DIR input Direction control for the 2An/2Bn channel: HIGH allows transmission from 2An to 2Bn and LOW allows transmission from 2Bn to 2An.
4 1A1 bidirectional Data input or output, referenced to VCC(A); high-impedance OFF-state when OE is HIGH or in suspend mode.
5 1A2 bidirectional Data input or output, referenced to VCC(A); high-impedance OFF-state when OE is HIGH or in suspend mode.
6 2A1 bidirectional Data input or output, referenced to VCC(A); high-impedance OFF-state when OE is HIGH or in suspend mode.
7 2A2 bidirectional Data input or output, referenced to VCC(A); high-impedance OFF-state when OE is HIGH or in suspend mode.
8 GND power_in Ground (0 V); all GND pins must be connected to ground.
9 GND power_in Ground (0 V); all GND pins must be connected to ground.
10 2B2 bidirectional Data input or output, referenced to VCC(B); high-impedance OFF-state when OE is HIGH or in suspend mode.
11 2B1 bidirectional Data input or output, referenced to VCC(B); high-impedance OFF-state when OE is HIGH or in suspend mode.
12 1B2 bidirectional Data input or output, referenced to VCC(B); high-impedance OFF-state when OE is HIGH or in suspend mode.
13 1B1 bidirectional Data input or output, referenced to VCC(B); high-impedance OFF-state when OE is HIGH or in suspend mode.
14 2OE input Output enable input, active LOW; HIGH disables the 2 channel outputs so the buses are isolated.
15 1OE input Output enable input, active LOW; HIGH disables the 1 channel outputs so the buses are isolated.
16 VCC(B) power_in Supply voltage B, 0.8 V to 3.6 V; the nBn inputs are referenced to VCC(B).
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-16-EP(2.5x3.5)
Category Logic
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage A VCC(A) -0.5 4.6 V 6
supply voltage B VCC(B) -0.5 4.6 V 6
input clamping current IIK -50 mA VI < 0 V 6
input voltage VI -0.5 4.6 V 6
output clamping current IOK -50 mA VO < 0 V 6
output voltage VO -0.5 4.6 V Suspend or 3-state mode 6
output current IO -50 50 mA VO = 0 V to VCCO 6
supply current per pin ICC 100 mA per VCC(A) or VCC(B) pin 6
ground current per GND pin IGND -100 mA per GND pin 6
storage temperature Tstg -65 150 °C 6
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C; SOT109-1, SOT403-1, SOT763-1 [4] 6
supply voltage A VCC(A) 0.8 3.6 V 6
supply voltage B VCC(B) 0.8 3.6 V 6
input voltage VI 0 3.6 V 6
output voltage (active mode) VO 0 V Active mode [1]; max = VCCO 6
output voltage (suspend or 3-state mode) VO 0 3.6 V Suspend or 3-state mode 6
ambient temperature Tamb -40 125 °C 6
input transition rise and fall rate Δt/ΔV 5 ns/V VCCI = 0.8 V to 3.6 V 6
input leakage current (nDIR, nOE) II -0.25 0.025 0.25 μA nDIR, nOE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V 7
input leakage current (A or B port) II -2.5 0.5 2.5 μA A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V [2] 7
OFF-state output current (suspend mode A port) IOZ -2.5 0.5 2.5 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [2] 7
OFF-state output current (suspend mode B port) IOZ -2.5 0.5 2.5 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [2] 7
IOFF power-off leakage current (A port) IOFF -1 0.1 1 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V 7
IOFF power-off leakage current (B port) IOFF -1 0.1 1 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V 7
HIGH-level input voltage (data input) VIH 1.6 V data input; VCCI = 2.3 V to 2.7 V 7
HIGH-level input voltage (data input) VIH 2 V data input; VCCI = 3.0 V to 3.6 V 7
HIGH-level input voltage (nDIR, nOE input) VIH 1.6 V nDIR, nOE input; VCC(A) = 2.3 V to 2.7 V 7
HIGH-level input voltage (nDIR, nOE input) VIH 2 V nDIR, nOE input; VCC(A) = 3.0 V to 3.6 V 7
LOW-level input voltage (data input) VIL 0.7 V data input; VCCI = 2.3 V to 2.7 V 8
LOW-level input voltage (data input) VIL 0.8 V data input; VCCI = 3.0 V to 3.6 V 8
LOW-level input voltage (nDIR, nOE input) VIL 0.7 V nDIR, nOE input; VCC(A) = 2.3 V to 2.7 V 8
LOW-level input voltage (nDIR, nOE input) VIL 0.8 V nDIR, nOE input; VCC(A) = 3.0 V to 3.6 V 8
HIGH-level output voltage VOH 0.85 V VI = VIH or VIL; IO = -3 mA; VCC(A) = VCC(B) = 1.1 V 8
HIGH-level output voltage VOH 1.05 V VI = VIH or VIL; IO = -6 mA; VCC(A) = VCC(B) = 1.4 V 8
HIGH-level output voltage VOH 1.2 V VI = VIH or VIL; IO = -8 mA; VCC(A) = VCC(B) = 1.65 V 8
HIGH-level output voltage VOH 1.75 V VI = VIH or VIL; IO = -9 mA; VCC(A) = VCC(B) = 2.3 V 8
HIGH-level output voltage VOH 2.3 V VI = VIH or VIL; IO = -12 mA; VCC(A) = VCC(B) = 3.0 V 8
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V 8
LOW-level output voltage VOL 0.25 V VI = VIH or VIL; IO = 3 mA; VCC(A) = VCC(B) = 1.1 V 8
LOW-level output voltage VOL 0.35 V VI = VIH or VIL; IO = 6 mA; VCC(A) = VCC(B) = 1.4 V 8
LOW-level output voltage VOL 0.45 V VI = VIH or VIL; IO = 8 mA; VCC(A) = VCC(B) = 1.65 V 8
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; IO = 9 mA; VCC(A) = VCC(B) = 2.3 V 8
LOW-level output voltage VOL 0.7 V VI = VIH or VIL; IO = 12 mA; VCC(A) = VCC(B) = 3.0 V 8
input leakage current (nDIR, nOE) II -5 5 μA nDIR, nOE input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V 8
input leakage current (A or B port) II -30 30 μA A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V [2] 8
OFF-state output current (suspend mode A port) IOZ -30 30 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [2] 8
OFF-state output current (suspend mode B port) IOZ -30 30 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [2] 8
IOFF power-off leakage current (A port) IOFF -30 30 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V 8
IOFF power-off leakage current (B port) IOFF -30 30 μA B port; VI or VO = 0 V or 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V 8
supply current (A port) ICC 55 μA A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 9
supply current (A port) ICC 50 μA A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V 9
supply current (A port) ICC -12 μA A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0 V; VCC(B) = 3.6 V 9
supply current (B port) ICC 55 μA B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 9
supply current (B port) ICC 50 μA B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V 9
supply current (B port) ICC -12 μA B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 3.6 V; VCC(B) = 0 V 9
supply current (A plus B port, ICC(A)+ICC(B)) ICC 70 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 9
supply current (A plus B port, ICC(A)+ICC(B)) ICC 65 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V 9

CAD (KiCad official)

  • Symbol: 74AVC4T245BQ
  • Footprint: Package_DFN_QFN:DHVQFN-16-1EP_2.5x3.5mm_P0.5mm_EP1x2mm
  • 3D model: DHVQFN-16-EP(2.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: 74avc4t245bq-etched.step / 74avc4t245bq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74avc4t245bq.step / 74avc4t245bq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (27 pp, sha256 d97d984b18da471e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF