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74AVC2T45DC

Public Made by Adom

by adom

Nexperia Translators / Level Shifters, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic ics74avc2t45dcfactory-2.0.0extractor-text

Verified 74AVC2T45DC

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: 74AVC2T45DC · VSSOP-8-0.5mm · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 24-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: VSSOP-8_2.3x2mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-1kmx986j/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.17)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ 74avc2t45dc.kicad_sym✓ 74avc2t45dc.kicad_mod✓ 74avc2t45dc.step
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Ray Publish 0.1.0 25afad8 20h ago

74AVC2T45DC

Nexperia · Translators / Level Shifters · VSSOP-8-0.5mm

74AVC2T45DC from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC(A) power_in Supply voltage A, referenced to pins 1A, 2A and DIR; operates from 0.8 V to 3.6 V.
2 1A bidirectional Data input or output on the A side, referenced to VCC(A); its input circuit is always active, and it is high-impedance when the device is in Suspend mode.
3 2A bidirectional Data input or output on the A side, referenced to VCC(A); its input circuit is always active, and it is high-impedance when the device is in Suspend mode.
4 GND power_in Ground (0 V).
5 DIR input Direction control, referenced to VCC(A); HIGH allows transmission from nA to nB and LOW allows transmission from nB to nA.
6 2B bidirectional Data input or output on the B side, referenced to VCC(B); its input circuit is always active, and it is high-impedance when the device is in Suspend mode.
7 1B bidirectional Data input or output on the B side, referenced to VCC(B); its input circuit is always active, and it is high-impedance when the device is in Suspend mode.
8 VCC(B) power_in Supply voltage B, referenced to pins 1B and 2B; operates from 0.8 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package VSSOP-8-0.5mm
Category Logic ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage A VCC(A) 0.8 3.6 V 5
supply voltage B VCC(B) 0.8 3.6 V 5
input voltage VI 0 3.6 V 5
output voltage VO 0 V Active mode 5
output voltage VO 0 3.6 V Suspend or 3-state mode 5
ambient temperature Tamb -40 125 °C 5
input transition rise and fall rate Δt/ΔV 5 ns/V VCCI = 0.8 V to 3.6 V 5
supply voltage A VCC(A) -0.5 4.6 V 4
supply voltage B VCC(B) -0.5 4.6 V 4
input clamping current IIK -50 mA VI < 0 V 4
input voltage VI -0.5 4.6 V 4
output clamping current IOK -50 mA VO < 0 V 4
output voltage VO -0.5 V Active mode 4
output voltage VO -0.5 4.6 V Suspend or 3-state mode 4
output current IO -50 50 mA VO = 0 V to VCCO 4
supply current ICC 100 mA ICC(A) or ICC(B) 4
ground current IGND -100 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 250 mW Tamb = -40 °C to +125 °C 4
HIGH-level input voltage (data input) VIH 1.6 V data input; VCCI = 2.3 V to 2.7 V 6
HIGH-level input voltage (data input) VIH 2 V data input; VCCI = 3.0 V to 3.6 V 6
HIGH-level input voltage (DIR input) VIH 1.6 V DIR input; VCC(A) = 2.3 V to 2.7 V 6
HIGH-level input voltage (DIR input) VIH 2 V DIR input; VCC(A) = 3.0 V to 3.6 V 6
LOW-level input voltage (data input) VIL 0.7 V data input; VCCI = 2.3 V to 2.7 V 6
LOW-level input voltage (data input) VIL 0.9 V data input; VCCI = 3.0 V to 3.6 V 6
LOW-level input voltage (DIR input) VIL 0.7 V DIR input; VCC(A) = 2.3 V to 2.7 V 6
LOW-level input voltage (DIR input) VIL 0.9 V DIR input; VCC(A) = 3.0 V to 3.6 V 6
HIGH-level output voltage VOH 0.85 V VI = VIH or VIL; IO = -3 mA; VCC(A) = VCC(B) = 1.1 V 6
HIGH-level output voltage VOH 1.05 V VI = VIH or VIL; IO = -6 mA; VCC(A) = VCC(B) = 1.4 V 6
HIGH-level output voltage VOH 1.2 V VI = VIH or VIL; IO = -8 mA; VCC(A) = VCC(B) = 1.65 V 6
HIGH-level output voltage VOH 1.75 V VI = VIH or VIL; IO = -9 mA; VCC(A) = VCC(B) = 2.3 V 6
HIGH-level output voltage VOH 2.3 V VI = VIH or VIL; IO = -12 mA; VCC(A) = VCC(B) = 3.0 V 6
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO = 100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V 6
LOW-level output voltage VOL 0.25 V VI = VIH or VIL; IO = 3 mA; VCC(A) = VCC(B) = 1.1 V 6
LOW-level output voltage VOL 0.35 V VI = VIH or VIL; IO = 6 mA; VCC(A) = VCC(B) = 1.4 V 6
LOW-level output voltage VOL 0.45 V VI = VIH or VIL; IO = 8 mA; VCC(A) = VCC(B) = 1.65 V 6
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; IO = 9 mA; VCC(A) = VCC(B) = 2.3 V 6
LOW-level output voltage VOL 0.7 V VI = VIH or VIL; IO = 12 mA; VCC(A) = VCC(B) = 3.0 V 6
input leakage current II -1.5 1.5 μA DIR input; VI = 0 V or 3.6 V; VCC(A) = VCC(B) = 0.8 V to 3.6 V 6
OFF-state output current IOZ -7.5 7.5 μA A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V 6
power-off leakage current IOFF -35 35 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V 7
A port supply current (layout-derived; symbol not printed) 11.5 μA A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 7
A port supply current (layout-derived; symbol not printed) -8 μA A port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0 V; VCC(B) = 3.6 V 7
B port supply current (layout-derived; symbol not printed) 11.5 μA B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 7
B port supply current (layout-derived; symbol not printed) -8 μA B port; VI = 0 V or VCCI; IO = 0 A; VCC(A) = 3.6 V; VCC(B) = 0 V 7
supply current A plus B port ICC 23 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V 7
propagation delay A to B tpd 1 7.9 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 1.2 V ± 0.1 V 10
propagation delay A to B tpd 0.5 5 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 1.5 V ± 0.1 V 10
propagation delay A to B tpd 0.5 4.1 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 1.8 V ± 0.15 V 10
propagation delay A to B tpd 0.5 3.1 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 2.5 V ± 0.2 V 10
propagation delay A to B tpd 0.5 2.7 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 3.3 V ± 0.3 V 10
propagation delay B to A tpd 1 6.8 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 1.2 V ± 0.1 V 10
propagation delay B to A tpd 0.6 4 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 1.5 V ± 0.1 V 10
propagation delay B to A tpd 0.5 3.5 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 1.8 V ± 0.15 V 10
propagation delay B to A tpd 0.5 2.9 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 2.5 V ± 0.2 V 10
propagation delay B to A tpd 0.5 2.7 ns VCC(A) = 3.0 V to 3.6 V; VCC(B) = 3.3 V ± 0.3 V 10

CAD (KiCad official)

  • Symbol: 74AVC2T45DC
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
  • 3D model files: 74avc2t45dc-etched.step / 74avc2t45dc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74avc2t45dc.step / 74avc2t45dc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (24 pp, sha256 9923d76889ece5df, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF