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74ALVC245BQ

Nexperia · Buffers, Drivers, Receivers, Transceivers · DHVQFN-20-EP(2.5x4.5)

74ALVC245BQ from Nexperia, in a DHVQFN-20-EP(2.5x4.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DIR input Direction control input that selects A-to-B transfer when HIGH and B-to-A transfer when LOW while OE is LOW.
2 A0 bidirectional Data input/output A0 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
3 A1 bidirectional Data input/output A1 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
4 A2 bidirectional Data input/output A2 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
5 A3 bidirectional Data input/output A3 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
6 A4 bidirectional Data input/output A4 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
7 A5 bidirectional Data input/output A5 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
8 A6 bidirectional Data input/output A6 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
9 A7 bidirectional Data input/output A7 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
10 GND power_in Ground reference at 0 V for all device voltages.
11 B7 bidirectional Data input/output B7 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
12 B6 bidirectional Data input/output B6 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
13 B5 bidirectional Data input/output B5 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
14 B4 bidirectional Data input/output B4 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
15 B3 bidirectional Data input/output B3 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
16 B2 bidirectional Data input/output B2 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
17 B1 bidirectional Data input/output B1 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
18 B0 bidirectional Data input/output B0 whose direction is set by DIR and whose output is disabled to high-impedance when OE is HIGH.
19 OE input Output enable input, active LOW; a HIGH level forces all A and B outputs into the high-impedance OFF-state.
20 VCC power_in Supply voltage with a recommended operating range of 1.65 V to 3.6 V.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-20-EP(2.5x4.5)
Category Logic
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 4.6 V 4
input voltage VI -0.5 4.6 V 4
output voltage (output HIGH or LOW state) VI -0.5 V output HIGH or LOW state 4
output voltage (output 3-state) VO -0.5 4.6 V output 3-state 4
output voltage (power-down mode) VO -0.5 4.6 V power-down mode; VCC = 0 V 4
input clamping current IIK -50 mA VI < 0 V 4
output clamping current IOK -50 50 mA VO > VCC or VO < 0 V 4
output current IO -50 50 mA VO = 0 V to VCC 4
supply current ICC 100 mA 4
ground current IGND -100 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
supply voltage VCC 1.65 3.6 V 4
input voltage VI 0 3.6 V 4
input voltage (output HIGH or LOW state) VI 0 V output HIGH or LOW state 4
input voltage (output 3-state) VI 0 3.6 V output 3-state 4
output voltage (power-down mode) VO 0 3.6 V power-down mode; VCC = 0 V 4
ambient temperature Tamb -40 125 °C in free air 4
input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 1.65 V to 2.7 V 4
input transition rise and fall rate Δt/ΔV 10 ns/V VCC = 2.7 V to 3.6 V 4
HIGH-level input voltage VIH 1.7 V VCC = 2.3 V to 2.7 V 5
HIGH-level input voltage VIH 2 V VCC = 2.7 V to 3.6 V 5
LOW-level input voltage VIL 0.7 V VCC = 2.3 V to 2.7 V 5
LOW-level input voltage VIL 0.8 V VCC = 2.7 V to 3.6 V 5
HIGH-level output voltage VOH 1.25 V IO = -6 mA; VCC = 1.65 V 5
HIGH-level output voltage VOH 1.8 V IO = -12 mA; VCC = 2.3 V 5
HIGH-level output voltage VOH 1.7 V IO = -18 mA; VCC = 2.3 V 5
HIGH-level output voltage VOH 2.2 V IO = -12 mA; VCC = 2.7 V 5
HIGH-level output voltage VOH 2.4 V IO = -18 mA; VCC = 3.0 V 5
LOW-level output voltage VOL 0.2 V IO = 100 μA; VCC = 1.65 V to 3.6 V 5
LOW-level output voltage VOL 0.3 V IO = 6 mA; VCC = 1.65 V 5
LOW-level output voltage VOL 0.4 V IO = 12 mA; VCC = 2.3 V 5
LOW-level output voltage VOL 0.6 V IO = 18 mA; VCC = 2.3 V 5
LOW-level output voltage VOL 0.45 V IO = 18 mA; VCC = 3.0 V 5
LOW-level output voltage VOL 0.55 V IO = 24 mA; VCC = 3.0 V 5
OFF-state output current IOZ -80 0.1 80 μA VI = VIH or VIL; VCC = 1.65 V to 3.6 V; VO = 3.6 V or GND 5
input leakage current II -20 0.1 20 μA VI = VCC or GND; VCC = 3.6 V 5
power-off leakage current IOFF -80 0.1 80 μA VI or VO = 0 V to 3.6 V; VCC = 0 V 5
supply current ICC 0.2 80 μA VI = VCC or GND; IO = 0 A; VCC = 3.6 V 5
additional supply current ΔICC 5 750 μA per input pin; VCC = 3.0 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A 5
propagation delay tpd 1 2.7 6.9 ns An to Bn; Bn to An; see Fig. 3; VCC = 1.65 V to 1.95 V 6
propagation delay tpd 1 2.1 4 ns An to Bn; Bn to An; see Fig. 3; VCC = 2.3 V to 2.7 V 6
propagation delay tpd 1 3 4.1 ns An to Bn; Bn to An; see Fig. 3; VCC = 2.7 V 6
propagation delay tpd 1 2.3 3.9 ns An to Bn; Bn to An; see Fig. 3; VCC = 3.0 V to 3.6 V 6
enable time ten 1 4 9.9 ns OE to An; OE to Bn; see Fig. 4; VCC = 1.65 V to 1.95 V 6
enable time ten 1 3 6.9 ns OE to An; OE to Bn; see Fig. 4; VCC = 2.3 V to 2.7 V 6
enable time ten 1 2.6 7.2 ns OE to An; OE to Bn; see Fig. 4; VCC = 2.7 V 6
enable time ten 1 2.9 6.3 ns OE to An; OE to Bn; see Fig. 4; VCC = 3.0 V to 3.6 V 6
disable time tdis 1 4.4 9.2 ns OE to An; OE to Bn; see Fig. 4; VCC = 1.65 V to 1.95 V 6
disable time tdis 1 2.3 5.5 ns OE to An; OE to Bn; see Fig. 4; VCC = 2.3 V to 2.7 V 6
disable time tdis 1 3.3 6.1 ns OE to An; OE to Bn; see Fig. 4; VCC = 2.7 V 6
disable time tdis 1 3.2 6.3 ns OE to An; OE to Bn; see Fig. 4; VCC = 3.0 V to 3.6 V 6

CAD (KiCad official)

  • Symbol: 74ALVC245BQ
  • Footprint: Package_DFN_QFN:DHVQFN-20-1EP_2.5x4.5mm_P0.5mm_EP1x3mm
  • 3D model: DHVQFN-20-EP(2.5x4.5) (KiCad packages3D, STEP)
  • 3D model files: 74alvc245bq-etched.step / 74alvc245bq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74alvc245bq.step / 74alvc245bq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 9a018be1f6580d89, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF