74ALVC02PW

@@ -0,0 +1,57 @@+# 74ALVC02PW++**Nexperia** · Logic Gates · TSSOP-14++74ALVC02PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1Y | output | Data output of NOR gate 1. Logic HIGH only when both inputs 1A and 1B are LOW. Output drive up to 24 mA at VCC = 3.0 V. |+| 2 | 1A | input | Data input A of NOR gate 1. Schmitt trigger input, overvoltage tolerant to 3.6 V. Input leakage current ±5 µA typ. |+| 3 | 1B | input | Data input B of NOR gate 1. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 4 | 2Y | output | Data output of NOR gate 2. Logic HIGH only when both inputs 2A and 2B are LOW. Output drive up to 24 mA at VCC = 3.0 V. |+| 5 | 2A | input | Data input A of NOR gate 2. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 6 | 2B | input | Data input B of NOR gate 2. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 7 | GND | power_in | Ground reference (0 V). Ground current IGND rated to -100 mA. |+| 8 | 3A | input | Data input A of NOR gate 3. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 9 | 3B | input | Data input B of NOR gate 3. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 10 | 3Y | output | Data output of NOR gate 3. Logic HIGH only when both inputs 3A and 3B are LOW. Output drive up to 24 mA at VCC = 3.0 V. |+| 11 | 4A | input | Data input A of NOR gate 4. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 12 | 4B | input | Data input B of NOR gate 4. Schmitt trigger input, overvoltage tolerant to 3.6 V. |+| 13 | 4Y | output | Data output of NOR gate 4. Logic HIGH only when both inputs 4A and 4B are LOW. Output drive up to 24 mA at VCC = 3.0 V. |+| 14 | VCC | power_in | Supply voltage input. Operating range 1.65 V to 3.6 V; absolute maximum -0.5 V to +4.6 V. Supply current ICC ≤ 20 µA typ. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Nexperia |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `74ALVC02PW`+- `74ALVC02PWD`+- `74ALVC02PWBQ`++## CAD (KiCad official)++- Symbol: `74ALVC02PW`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74ALVC02PW.pdf) (12 pp, sha256 `19d430faa98000fc`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74alvc02pw-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "74alvc02pw",+  "version": "0.1.0",+  "type": "component",+  "description": "Nexperia Logic Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "74alvc02pw"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "74alvc02pw.kicad_sym",+    "74alvc02pw.kicad_mod",+    "74alvc02pw.glb",+    "74alvc02pw.step",+    "74alvc02pw.lbr",+    "docs/hero.png",+    "docs/74alvc02pw-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file